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Computer processor which works on arrays of several numbers at once
In computing, a vector processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently
Vector_processor
Quickly accessible working storage available as part of a digital processor
A processor register is a quickly accessible storage location available to a computer's processor. Registers usually consist of a small amount of fast
Processor_register
Class of computer processors
processor is classified as a single instruction, single data (SISD) processor in Flynn's taxonomy. The Intel 486 is an example of a scalar processor.
Scalar_processor
Specialized electronic circuit that accelerates graphics
the Geometry Engine, a VLSI vector processor ASIC designed by Jim Clark and Marc Hannah at Stanford University. This processor is the forerunner of modern
Graphics_processing_unit
CPU that implements instruction-level parallelism within a single processor
processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor
Superscalar_processor
Multi-core processor with a large number of cores
Coherent Logix hx3100 Processor, a 100-core DSP/GPP processor based on HyperX Architecture Movidius Myriad 2, a manycore vision processing unit (VPU) Kalray
Manycore_processor
Mainframe computer from DEC
using custom ECL-based processors implementing the VAX instruction set architecture (ISA). Equipped with optional vector processors, they were marketed into
VAX_9000
Multi-core microprocessor microarchitecture
As used in the PlayStation 3, the processor has 250 million transistors. In a simple analysis, the Cell processor can be divided into four components:
Cell_(processor)
Type of parallel processing
the use of SIMD-capable instructions. A later processor that used vector processing is the Cell processor used in the PlayStation 3, which was developed
Single instruction, multiple data
Single_instruction,_multiple_data
Open-source network switching framework
Vector packet processing — The Vector Packet Processor 20.01 documentation". fd.io. Retrieved 2020-08-12. "[Guide] Intro to Vector Packet Processing (VPP)"
Vector_Packet_Processing
Instructions for the x86 microprocessors
Knights Landing co-processor, which shipped in 2016. In conventional processors, AVX-512 was introduced with Skylake server and HEDT processors in 2017. AVX
Advanced_Vector_Extensions
Research institute in high-performance computing
facilitate user access to its services. This strategy was centred on the SX vector processor architecture of NEC. The IBM SP4, installed 2002, was the first production
Swiss National Supercomputing Centre
Swiss_National_Supercomputing_Centre
Central processing unit by Sony Computer Entertainment and Toshiba
units are: a CPU core, two Vector Processing Units (VPU), a 10-channel DMA unit, a memory controller, and an Image Processing Unit (IPU). There are three
Emotion_Engine
Central computer component that executes instructions
A central processing unit (CPU), also known as a central processor, main processor, or simply processor, is the primary processor in a given computer
Central_processing_unit
FR-V (Fujitsu RISC-VLIW) is a processor able to process both a very long instruction word (VLIW) and vector processor instructions at the same time,
FR-V_(microprocessor)
In computing, chaining is a technique used in vector processors in which vector registers generate interim results which can be used immediately, without
Chaining_(vector_processing)
VLSI chip
Geometry Engine is an early very large scale integrated circuit (VLSI) vector processor designed for 3D computer graphics by Jim Clark and Marc Hannah at Stanford
Geometry_Engine
Classification of computer architectures
and explicit timing delays to synchronize data flow from processor to processor. Each processor in a systolic system executes an invariant sequence of instructions
Duncan's_taxonomy
Form of conditionals in computer programming
applying one bit of a conditional mask vector to the corresponding elements in the vector registers being processed, whereas scalar predication in scalar
Predication (computer architecture)
Predication_(computer_architecture)
Timeline of early 3D graphics hardware
probably many more instances than listed. "Matrix multiplier", "vector processor", "tensor processor", "3D accelerator", "Geometry Engine", and "geometry pipeline"
Timeline of early 3D computer graphics hardware
Timeline_of_early_3D_computer_graphics_hardware
Programming paradigm in which many processes are executed simultaneously
is the processor frequency (cycles per second). Increases in frequency increase the amount of power used in a processor. Increasing processor power consumption
Parallel_computing
Address from which a CPU starts fetching instructions after a reset
typically used addresses by different microprocessors: The reset vector for the Intel 8086 processor is at physical address FFFF0h (16 bytes below 1 MB). The
Reset_vector
Miniprocessor chip set
devices implemented the VAX vector processor option; these comprised the DC555 Vector Register set chip (VERSE) and the DC556 Vector Data Path chip (FAVOR)
Rigel_(microprocessor)
high-performance workstation type machines, while Ardent developed a custom vector processor that allowed it to compete with large supercomputers for graphics-related
Stardent_Inc.
Computer processor
The NEC SX-Aurora TSUBASA is a vector processor of the NEC SX architecture family. Unlike previous SX supercomputers, the SX-Aurora TSUBASA is provided
NEC_SX-Aurora_TSUBASA
(Virtual Vector Architecture) is a technology from IBM for coupling together multiple scalar floating point units to act as a single vector processor. Certain
IBM_ViVA
Type of program in computer graphics
is then compiled into a shader. List of common shading algorithms Vector processor DirectCompute CUDA SPIR-V Metal (API) GPGPU "Vulkan® 1.4.323 - A Specification"
Shader
Open-source CPU instruction set architecture
general-purpose mixed-precision vector processor, suitable to execute compute kernels. Code would port easily to CPUs with differing vector lengths, ideally without
RISC-V
Supercomputer by Cray Research
The Cray C90 series (initially named the Y-MP C90) was a vector processor supercomputer launched by Cray Research in 1991. The C90 was a development of
Cray_C90
Type of data structure
one-dimensional array of words, whose indices are their addresses. Processors, especially vector processors, are often optimized for array operations. Arrays are useful
Array_(data_structure)
Applying operations to whole sets of values simultaneously
arrays can be called a vectorized operation, regardless of whether it is executed on a vector processor, which implements vector instructions. Array programming
Array_programming
the previous generations. It was a parallel vector processor and supported one to four vector processors. In 1994, the S-3000 family was complemented
HITAC_S-3000
integer registers, and 8 32-bit address registers. The new vector processor increased vector processing speed by reducing the in-register cycle time to 42 ns
Alliant_Computer_Systems
Supercomputer
Instruments (TI) between 1966 and 1973. The ASC's central processing unit (CPU) supported vector processing, a performance-enhancing technique which was key to
TI Advanced Scientific Computer
TI_Advanced_Scientific_Computer
Topics referred to by the same term
Vector facility may refer to: Vector facility on the IBM 3090 Vector Facility for z/Architecture Vector processor This disambiguation page lists articles
Vector_facility
Classification of computer architectures
term for associative processor is analogous to cells of content-addressable memory each having their own processor. Such processors are very rare. broadcast_value
Flynn's_taxonomy
1974 supercomputer
Data Corporation (CDC). It was one of the first machines to use a vector processor to improve performance on appropriate scientific applications. It was
CDC_STAR-100
Algorithm for partial ordering of events and detecting causality in distributed systems
timestamps, inter-process messages contain the state of the sending process's logical clock. A vector clock of a system of n processes is a vector (equivalently
Vector_clock
J90 series (code-named Jedi during development) was an air-cooled vector processor supercomputer first announced by Cray Research in 1994. The J90 evolved
Cray_J90
two gates per chip, was a vector processor. It introduced a number of innovations, such as chaining, in which scalar and vector registers generate interim
History_of_supercomputing
Type of memory addressing
is the vector equivalent of register indirect addressing, with gather involving indexed reads, and scatter, indexed writes. Vector processors (and some
Gather/scatter (vector addressing)
Gather/scatter_(vector_addressing)
eight vector processors, which share up to 64 GB of computer memory. The SX-6 processor is a single chip implementation containing a vector processor unit
NEC_SX-6
Supercomputer built by NEC Corporation
single chip vector processor that was introduced with the SX-6. The NEC SX-9 processors run at 3.2 GHz, with eight-way replicated vector pipes, each having
NEC_SX-9
CPU that switches between threads of execution on every cycle
automatically generate a corresponding barrel processor design from a single-tasking processor design. An n-way barrel processor generated this way acts much like
Barrel_processor
Instruction set extension by Intel
Fastest Gaming Processor?". www.techpowerup.com. 30 March 2021. ""Add rocketlake to gcc" commit". gcc.gnu.org. "Intel Celeron 6305 Processor (4M Cache, 1
AVX-512
Series of supercomputers by NEC
SX Vector Engine (VE) is a vector processor, and each VE core has a Scalar Processing Unit (SPU) with 64 scalar registers of 64 bits, and a Vector Processing
NEC_SX
Case in parallel computing
result in vector code where applicable, much like manual use of intrinsics or vector datatypes. Chaining (vector processing) Vector processor Auto-vectorization
Automatic_vectorization
Supercomputer manufactured by Cray Research
The Cray-1 was the first supercomputer to successfully implement the vector processor design. These systems improve the performance of math operations by
Cray-1
Supercomputer made starting in 2003
The Cray X1 is a non-uniform memory access, vector processor supercomputer manufactured and sold by Cray Inc. since 2003. The X1 is often described as
Cray_X1
IBM's 64-bit instruction set architecture implemented by its mainframe computers
implementation includes two independent SIMD units to operate on vector data. The older vector processor facility first introduced from the IBM 3090 and also supported
Z/Architecture
Computing technique used to achieve parallelism
This computer consisted of a master (controller processor) and SIMD processors (or vector processor mode as proposed by Flynn). In Auguin's SPMD model
Single_program,_multiple_data
SV1 included a vector cache. It also introduced a feature called multi-streaming, in which one processor from each of four processor boards work together
Cray_SV1
Data structure
interrupt vector table, called an interrupt vector, is the address of an interrupt handler (also known as ISR). While the concept is common across processor architectures
Interrupt_vector_table
SX-ACE is a vector supercomputer based on the NEC SX series by NEC Corporation. It features NEC's first multi-core System on a Chip vector processor design
NEC_SX-ACE
Apple-branded microprocessor
closely related) processor models from Freescale, a former part of Motorola. Motorola and Freescale's internal name of this family of processors is PowerPC
PowerPC_G4
heart of the console's configuration is its central processing unit (CPU), a custom RISC processor known as the Emotion Engine which operates at 294.912 MHz
PlayStation 2 technical specifications
PlayStation_2_technical_specifications
Type of instruction set architecture
example of a load–store architecture was the CDC 6600. Almost all vector processors (including many GPUs[better source needed]) use the load–store approach
Load–store_architecture
Topics referred to by the same term
in Wiktionary, the free dictionary. XMS may refer to: Cray XMS, a vector processor minisupercomputer eBuddy XMS, instant-messaging service ISO 639:xms
XMS
Supercomputer built by NEC Corporation
version of the single chip vector processor that was introduced with the SX-6. The NEC SX-8 processors run at 2 GHz for vectors and 1 GHz for scalar operations
NEC_SX-8
1985 supercomputer model
The Cray-2 is a supercomputer with four vector processors made by Cray Research starting in 1985. At 1.9 GFLOPS peak performance, it was the fastest machine
Cray-2
Computer programming paradigm
primary controlling processor—the Power Processing Element (PPE)—and an array of vector coprocessors called Synergistic Processing Elements (SPEs). Because
Stream_processing
Problem easily dividable into parallel tasks
programming Shared-nothing architecture (SN) Symmetric multiprocessing (SMP) Vector processor Herlihy, Maurice; Shavit, Nir (2012). The Art of Multiprocessor Programming
Embarrassingly_parallel
Extension to the x86 instruction set by AMD
x86 instruction set, enabling it to perform vector processing of floating-point vector operations using vector registers. This improvement enhances the performance
3DNow!
Supercomputer manufactured by Cray Research
improvement over the Cray-1 was that it was a shared-memory parallel vector processor, the first such computer from Cray Research. It housed up to four CPUs
Cray_X-MP
Japanese supercomputer
Hitachi's first supercomputer, although the company had previously built a vector processor, the IAP. The first system shipped was a top-end S-810/20 model, which
HITAC_S-810
Geometric object that has length and direction
physics, and engineering, a Euclidean vector or simply a vector (sometimes called a geometric vector or spatial vector) is a geometric object that has magnitude
Euclidean_vector
Algebraic structure in linear algebra
operations of vector addition and scalar multiplication must satisfy certain requirements, called vector axioms. Real vector spaces and complex vector spaces
Vector_space
Metric to measure computing performance in 64-bit processors and above
F(i). Choose the weighting factor for each processor: 0.9 for vector processors and 0.3 for non-vector processors. This is W(i). Calculate the APP for the
Adjusted_Peak_Performance
Broad concept generalizing scalars in mathematics and physics
In mathematics and physics, a vector is a generalization of a single number. It may denote a vector quantity, i.e., physical quantity that cannot be expressed
Vector (mathematics and physics)
Vector_(mathematics_and_physics)
Type of database that uses vectors to represent other data
A vector database, vector store or vector search engine is a database that stores and retrieves embeddings of data in vector space. Vector databases typically
Vector_database
Use of many processors to perform simultaneous operations
Connection Machine Cellular automaton CUDA framework Manycore processor Vector processor Spatial architecture. Grid computing: experiment management, tool
Massively_parallel
AMD neural processing unit microarchitecture
contains: A VLIW + SIMD vector processor optimized for high-throughput compute tasks and tensor operations. A scalar RISC-style processor responsible for control
AMD_XDNA
vector processors. The VP2000 was similar in many ways to their earlier designs, and in turn to the Cray-1, using a register-based vector processor for
Fujitsu_VP2000
2013 processor microarchitecture
"Desktop 4th Generation Intel Core Processor Family, Desktop Intel Pentium Processor Family, and Desktop Intel Celeron Processor Family: Specification Update
Haswell_(microarchitecture)
Range of mainframe-class supercomputers
semiconductor memory in this series. The central processor has no I/O instructions, relying upon the peripheral processor (PP) units to do I/O. A Cyber 170-series
CDC_Cyber
1990 minisupercomputer
The Cray XMS was a vector processor minisupercomputer sold by Cray Research from 1990 to 1991. The XMS was originally designed by Supertek Computers Inc
Cray_XMS
Set of methods for supervised statistical learning
In machine learning, a support vector machine (SVM) or support vector network is a supervised max-margin model with associated learning algorithms that
Support_vector_machine
64-bit RISC instruction set architecture
Alpha processor to feature a vector processor unit. A persistent report attributed to DEC insiders suggests the choice of the AXP tag for the processor was
DEC_Alpha
64-bit extension of the ARM architecture
computer processor designs. It was introduced in 2011 with the ARMv8 architecture and later became part of the ARMv9 series. AArch64 allows processors to handle
AArch64
Processor with an instruction set customized (optimized) for a specific task
a transport triggered vector processor for turbo decoding", Springer Journal of Analog Integrated Circuits and Signal Processing, March 2014. Hautala,
Application-specific instruction set processor
Application-specific_instruction_set_processor
American supercomputer manufacturer
Cray model line, the Cray SV1, was launched. This was a clustered SMP vector processor architecture, developed from J90 technology. On March 2, 2000, Cray
Cray
Line of mainframe computers
synchronizing the systems to ease management Vector Facility: up to one vector processor per Central Processor available on the 9021 and 9121. First used
IBM_System/390
Mathematical software
BLAS (Basic Linear Algebra Subprograms) libraries for performing basic vector and matrix operations. The LINPACK benchmarks appeared initially as part
LINPACK
GPU used in the Xbox 360
is capable of running either pixel or vertex shaders) 10 FP ops per vector processor per cycle (5 fused multiply-add) Maximum vertex count: 1.21 billion
Xenos_(graphics_chip)
Microprocessor with more than one processing unit
processor, a nine-core processor with one general purpose PowerPC core and eight specialized SPUs (Synergistic Processing Unit) optimized for vector operations
Multi-core_processor
Japanese supercomputer
scalar and vector processor, similar to the architecture of the S-810. The scalar processor is based on the Hitachi M-series mainframe processor, so is compatible
HITAC_S-820
Measure of computer performance
and performance". NEC's SX-9 supercomputer was the world's first vector processor to exceed 100 gigaFLOPS per single core. In June 2006, a new computer
Floating point operations per second
Floating_point_operations_per_second
American computer company
the Supertek S-1, a compact, air-cooled, CMOS clone of the Cray X-MP vector processor supercomputer running the CTSS (Cray Time Sharing System) operating
Supertek_Computers
Orthonormalization of a set of vectors
numerical analysis, the Gram–Schmidt process or Gram-Schmidt algorithm is a way of finding a set of two or more vectors that are perpendicular to each other
Gram–Schmidt_process
Method in natural language processing
representation is a real-valued vector that encodes the meaning of the word in such a way that the words that are closer in the vector space are expected to be
Word_embedding
Part of a computer system
independently of other processor units. Load–store units may also be used in vector processing, and in such cases the term "load–store vector" may be used. Some
Load–store_unit
AMD computing architecture
proposing their own alternative. A single AI engine is a 7-way VLIW processor that offers vector and scalar capabilities, enabling parallel execution of multiple
AI_engine
Synthetic benchmark for evaluating the performance of computers
original Whetstone Benchmark to fully exploit capabilities of the new vector processors since 1972. Results were included in the paper “Performance of Multi-User
Whetstone_(benchmark)
Supercomputer by Cray Research
The Cray EL90 series was an air-cooled vector processor supercomputer first sold by Cray Research in 1993. The EL90 series evolved from the Cray Y-MP EL
Cray_EL90
Random-access memory with processing elements integrated on the same chip
conventional processor) can give orders of magnitude better performance on some problems than traditional DRAM (in a system with the same processor). Some embarrassingly
Computational_RAM
Nikon media processors
on a chip solution integrates an image processor in multi-core processor architecture, with each single processor-core able to compute many instructions/operations
Expeed
Message-passing system for parallel computers
rank-0 process, and some implementations also capture and funnel the output from other processes. MPI uses the notion of process rather than processor. Program
Message_Passing_Interface
Type of extremely powerful computer
supercomputer used 166 vector processors to gain the top spot in 1994 with a peak speed of 1.7 gigaFLOPS (GFLOPS) per processor. The Hitachi SR2201 obtained
Supercomputer
Set of computers configured in a distributed computing system
massive parallelism. Unlike symmetric multi-processor systems, where scalability eventually fades as more processors are added (and thus either becomes more
Computer_cluster
1993 supercomputer by Fujitsu and NAL
connected 166 vector processors with a gate delay as low as 60 ps in the Ga-As chips. The resulting cycle time was 9.5 ns. The processor had four independent
Numerical_Wind_Tunnel
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