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Vector Pipeline L.P. is a 348-mile-long natural gas pipeline which transports approximately 1 billion cubic feet (28,000,000 m3) per day of natural gas
Vector_Pipeline
Mechanism for inter-process communication using message passing
computer operating systems, a pipeline is a mechanism for inter-process communication using message passing. A pipeline is a set of processes chained
Pipeline_(Unix)
Range of mainframe-class supercomputers
1981. The Cyber 205 replaces the STAR vector pipeline with redesigned vector pipelines: both scalar and vector units utilized ECL gate array ICs and are
CDC_Cyber
Component of Canadian energy infrastructure
Energy Pipeline Association (CEPA), whose 2019 members included Alliance Pipeline (natural gas), ATCO Pipelines (natural gas), Enbridge, Inter Pipeline, Pembina
Pipelines_in_Canada
Procedure to convert 3D scenes to 2D images
The computer graphics pipeline, or simply graphics pipeline, also known as the rendering pipeline, is a series of procedures for transforming a three-dimensional
Graphics_pipeline
African Gas Pipeline Altai gas pipeline (planned) Arab Gas Pipeline Pak Arab Pipeline Co. Ltd Sui Southern Pipeline Ltd Sui Northern Gas Pipelines Limited
List_of_natural_gas_pipelines
Canadian energy company
Crossing Pipeline". Pipeline and Gas Journal. January 22, 2020. Retrieved July 16, 2021. Canada Energy Regulator (June 9, 2021). "Pipeline Profiles: Vector".
Enbridge
Computer processor which works on arrays of several numbers at once
used pipeline parallelism to implement vector instructions rather than multiple ALUs. In addition, the design had completely separate pipelines for different
Vector_processor
Supercomputer by Cray Research
Y-MP architecture. Compared to the Y-MP, the C90 processor had a dual vector pipeline and a faster 4.1 ns clock cycle (244 MHz), which together gave three
Cray_C90
limitations, e.g. in camera degrees of freedom. 3D graphics pipeline A graphics pipeline taking 3D models and producing a 2D bitmap image result. 3D paint
Glossary_of_computer_graphics
Central processing unit by Sony Computer Entertainment and Toshiba
forerunner to hardware vertex shader pipelines. Each VPU features 32 128-bit vector SIMD registers (holding 4D vector data), 16 16-bit fixed-point registers
Emotion_Engine
US war plan against the British Empire
Pipeline Maritimes & Northeast Pipeline Northern Border Pipeline Northwest Pipeline Portland–Montreal pipeline Vector Pipeline Territorial claims in the Arctic
War_Plan_Red
Shootdown incident over Yukon, Canada
Pipeline Maritimes & Northeast Pipeline Northern Border Pipeline Northwest Pipeline Portland–Montreal pipeline Vector Pipeline Territorial claims in the Arctic
2023 Yukon high-altitude object
2023_Yukon_high-altitude_object
architecture. The vector processor is made up of eight vector pipeline units each with seventy-two 256-word vector registers. The vector unit performs add/shift
NEC_SX-6
Method of improving instruction-level parallelism
the Z1 in 1939 and the Z3 in 1941. Pipelining began in earnest in the late 1970s in supercomputers such as vector processors and array processors.[citation
Instruction_pipelining
Classification of computer architectures
1990. Duncan suggested modifications to Flynn's taxonomy to include pipelined vector processes. The taxonomy was developed during 1988-1990 and was first
Duncan's_taxonomy
County in Illinois, United States
Transmission TransCanada ANR Pipeline - Fully owned & operated Northern Border Pipeline - Partially owned & fully operated Vector Pipeline ExxonMobil owns and
Will_County,_Illinois
Conversion of a vector-graphics image to a raster image
Graphics pipeline for rasterization in commodity graphics hardware Raster image processor for 2D rasterization in printing systems Raster to vector for conversion
Rasterisation
1943 murder in New York City, United States
Pipeline Maritimes & Northeast Pipeline Northern Border Pipeline Northwest Pipeline Portland–Montreal pipeline Vector Pipeline Territorial claims in the Arctic
Murder_of_Patricia_Lonergan
1974 supercomputer
elements, the time cost of setting up the vector pipeline was higher than the time savings provided by the vector instruction(s). When the machine was released
CDC_STAR-100
Non-destructive testing method
Most pipeline inspection companies have proprietary software designed to view their own tool's collected data. The three components of the MFL vector field
Magnetic_flux_leakage
Problems with central processing unit design
processing unit (CPU) design, hazards are problems with the instruction pipeline in CPU microarchitectures when the next instruction cannot execute in the
Hazard (computer architecture)
Hazard_(computer_architecture)
Type of program in computer graphics
programmable operation which is applied to data as it moves through the rendering pipeline. Shaders act on data such as vertices and primitives, generate or morph
Shader
2014 family of multi-core microprocessors by IBM
unit (FXU) Vector and scalar unit (VSU) Decimal floating-point unit (DFU) Each core has sixteen execution pipelines: Two fixed-point pipelines Two load-store
POWER8
Supercomputer manufactured by Cray Research
arranged sequentially in memory — the pipelines can be tuned to improve the performance of fetches. On the receipt of a vector instruction, special hardware sets
Cray-1
Natural gas transmission and distribution company
assets. The Māui pipeline, constructed separately in the 1970s, was owned by Māui Development Ltd and operated independently of NGC/Vector. In 2016, First
First_Gas
CPU that implements instruction-level parallelism within a single processor
processor containing multiple parallel pipelines, each pipeline being superscalar. Some processors also include vector capability. Eager execution Hyper-threading
Superscalar_processor
Hardware component of GPUs which calculates final pixel values
The pixel pipelines take pixel (each pixel is a dimensionless point) and texel information and process it, via specific matrix and vector operations
Render_output_unit
Instruction set extension by Intel
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel
AVX-512
2015 64-bit mainframe microprocessor by IBM
enhancements such as a new superscalar pipeline, on-chip cache design and error correction. The instruction pipeline has an instruction queue that can fetch
IBM_z13
4-component vector data type in computer science
(GPU) shader pipelines used very long instruction word (VLIW) instruction sets tailored for similar operations. SIMD use for 4D vectors can be conveniently
4D_vector
Japanese supercomputer
were announced in July 1987. These two models differ in the number of vector pipelines installed. In May 1988, the S-820/20 and S-820/40 were announced, followed
HITAC_S-820
Cryptography algorithm
initialization vector (IV), for each encryption operation. The IV must be non-repeating, and for some modes must also be random. The initialization vector is used
Block cipher mode of operation
Block_cipher_mode_of_operation
Programming paradigm in which many processes are executed simultaneously
linear arrays of numbers or vectors. An example vector operation is A = B × C, where A, B, and C are each 64-element vectors of 64-bit floating-point numbers
Parallel_computing
Group of 32-bit RISC processor cores
protection unit (MPU) and the vector table relocation. Key features of the Cortex-M0+ core are: ARMv6-M architecture 2-stage pipeline (one fewer than Cortex-M0)
ARM_Cortex-M
Japanese supercomputer
eight 256-bit vector mask registers and 48 vector address registers. All models have three load pipelines and one load/store pipeline for accessing the
HITAC_S-810
VLSI chip
Geometry Engine is an early very large scale integrated circuit (VLSI) vector processor designed for 3D computer graphics by Jim Clark and Marc Hannah
Geometry_Engine
Case in parallel computing
example because of pipeline synchronization or data-movement timing. Loop dependence analysis identifies loops that can be vectorized, relying on the data
Automatic_vectorization
Shading algorithm in computer graphics
fixed-function pipeline (before Direct3D 10 and OpenGL 3.1), and is carried out on each vertex as it passes down the graphics pipeline; pixel values between
Blinn–Phong_reflection_model
Australian construction management company
several companies to enhance their service offering, including Vector Engineering, Pipeline Systems Incorporated (PSI) and Sandwell. This increased employee
Ausenco
Infrastructure for hydrogen transport and distribution
infrastructure is the infrastructure of points of hydrogen production, truck and pipeline transport, and hydrogen stations for the distribution and sale of hydrogen
Hydrogen_infrastructure
Component in electronic graphics processing units (GPUs)
The function of the vertex pipeline in any GPU is to take geometry data (usually supplied as vector points), work with it if needed with either fixed function
Vertex_pipeline
Form of conditionals in computer programming
Instruction-level parallelism Optimizing compiler Pipeline stall Software pipelining Speculative execution Vector processor Very long instruction word Rick Vinyard
Predication (computer architecture)
Predication_(computer_architecture)
Programming syntax
= {1, 2, 3, 4, 5, 6, 7, 8, 9, 10}; // Pipeline: filter even numbers, double them, and then sum the result vector<int> result = numbers | filter([](int
Method_chaining
Type of parallel processing
The Pentium 3 (1999) Short Vector Extensions in Commercial Microprocessor Article about Optimizing the Rendering Pipeline of Animated Models Using the
Single instruction, multiple data
Single_instruction,_multiple_data
Python library for machine learning
classification, regression and clustering algorithms including support-vector machines, random forests, gradient boosting, k-means and DBSCAN, and is
Scikit-learn
Packets of geographic data in vector format
"vector maps". The tile server pipeline TileStache supports several flavours of JSON natively. There is also a plugin vector tile provider called VecTiles
Vector_tiles
Parallel computing data layout methods
fields is interleaved using tiles or blocks with size equal to the SIMD vector size. This is often less intuitive, but can achieve the memory throughput
AoS_and_SoA
Open-source CPU instruction set architecture
ARM's Scalable Vector Extension. That is, each vector in up to 32 vectors is the same length. The application specifies the total vector width it requires
RISC-V
Method of CPU communication
Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous
Memory-mapped I/O and port-mapped I/O
Memory-mapped_I/O_and_port-mapped_I/O
Register in a computer's CPU
Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous
Memory_buffer_register
Classification of computer architectures
multiprogramming context has evolved as an extension of the classification system. Vector processing, covered by Duncan's taxonomy, is missing from Flynn's work because
Flynn's_taxonomy
Processor design concept
instruction pipeline, searches are fast and cause essentially no performance penalty. However, to be able to search within the instruction pipeline, the TLB
Translation_lookaside_buffer
low-pressure gas pipelines that distribute gas to end users are owned by First Gas (Northland, Waikato, Bay of Plenty, Gisborne, Kapiti Coast), Vector (Auckland)
Oil and gas industry in New Zealand
Oil_and_gas_industry_in_New_Zealand
Parallel computing architecture
where many functional units perform different operations on the same data. Pipeline architectures belong to this type, although they arguably differ in that
Multiple instruction, single data
Multiple_instruction,_single_data
High-level shading language
Architecture Review Board) to give developers more direct control of the graphics pipeline without having to use ARB assembly language or hardware-specific languages
OpenGL_Shading_Language
distributed computing framework KNIME — modular data pipelining LIBSVM — library for support vector machines LightGBM — machine learning framework for gradient
Lists of open-source artificial intelligence software
Lists_of_open-source_artificial_intelligence_software
Italian renewable energy company
[citation needed] In 2014, through the acquisition of Vector Cuatro (later renamed into Vector Renewables), the company entered the market of asset management
Renantis
High-performance CPU core design
instruction set and AArch64 execution state at all exception levels. Scalable Vector Extension (SVE) and SVE2: These extensions provide advanced SIMD and floating-point
ARM_Cortex-X925
Vector-based collection of geographic information system (GIS) data about Earth
The Vector Map (VMAP), also called Vector Smart Map, is a vector-based collection of geographic information system (GIS) data about Earth at various levels
Vector_Map
Hardware cache of a central processing unit
physical resource has to be scheduled to service two points in the pipeline. Thus the pipeline naturally ends up with at least three separate caches (instruction
CPU_cache
Type of instruction set architecture
earliest example of a load–store architecture was the CDC 6600. Almost all vector processors (including many GPUs[better source needed]) use the load–store
Load–store_architecture
Security-related instruction code processor extension
Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous
Software_Guard_Extensions
SQL relational database management system
Actian Vector (formerly known as VectorWise) is an SQL relational database management system designed for high performance in analytical database applications
Actian_Vector
In microprocessor architecture
instructions that would normally cause pipeline stalls without holding up the rest of the pipeline. The instruction delay pipeline is used for the Out-Of-Order
Power_Processing_Element
6-stage long pipeline (floating point multiply accumulator × 1, floating point divider × 1). FPU is not IEEE compliant. Two 32-bit VLIW-SIMD vector units at
PlayStation 2 technical specifications
PlayStation_2_technical_specifications
Antimicrobial substance active against bacteria
Infectious Disease Society of America report that the weak antibiotic pipeline does not match bacteria's increasing ability to develop resistance. The
Antibiotic
Class of computer processors
difference between scalar and vector arithmetic. The term scalar in computing dates to the 1970 and 1980s when vector processors were first introduced
Scalar_processor
Producing images of 3D scenes
usually more efficient, as there are fewer objects than pixels. 2D vector graphics The vector displays of the 1960s-1970s used deflection of an electron beam
Rendering_(computer_graphics)
Computer processor
eight SX-Aurora cores has 64 logical vector registers. These have 256 x 64 Bits length implemented as a mix of pipeline and 32-fold parallel SIMD units. The
NEC_SX-Aurora_TSUBASA
Series of graphics editors developed by Apple
Pixelmator Classic users, featuring a redesigned interface, a graphics pipeline rewritten using Metal, Apple silicon support and a greater focus on ML/AI
Pixelmator
Algorithm for modelling sequential data
numerical representations called tokens, and each token is converted into a vector via lookup from a word embedding table. At each layer, each token is then
Transformer_(deep_learning)
Region of space in the modeled world that may appear on the screen
view-plane normal – a normal to the view plane. VUV the view-up vector – the vector on the view plane that indicates the upward direction. VRP the viewing
Viewing_frustum
Airport in Peru
processes natural gas from the Camisea gas fields and sends it along two pipelines for export and domestic use. The Malvinas VOR-DME (Ident: MLV) and non-directional
Las_Malvinas_Airport
Increasing execution speed and reducing the overheads associated with loops
performance. This involves each vector operation being done for a size less-than or equal-to the maximum vector length on a given vector machine. The unimodular
Loop_optimization
Computing paradigm to improve computational efficiency
has a bit vector recording which registers will be written to by a pipeline. If any input operands have the corresponding bit set in this vector, the instruction
Out-of-order_execution
Computer hardware
(to provide a FIFO instruction ordering queue) implemented as an array/vector (which allows recording of results against instructions as they complete
Re-order_buffer
Screen-space shading technique
Screen space directional occlusion can be made part of the deferred shading pipeline to give directionality to shadows and interreflections. The primary advantage
Deferred_shading
Method of improving computer program speed
autoparallelization refers to converting sequential code into multi-threaded and/or vectorized code in order to use multiple processors simultaneously in a shared-memory
Automatic_parallelization
Central computer component that executes instructions
Therefore, pipelined processors must check for these sorts of conditions and delay a portion of the pipeline if necessary. A pipelined processor can
Central_processing_unit
AMD neural processing unit microarchitecture
Engine tiles, enabling parallel and pipelined processing of ML workloads. Each tile includes: VLIW + SIMD vector cores optimized for common ML operators
AMD_XDNA
Algorithm for computing trigonometric, hyperbolic, logarithmic and exponential functions
the final vector. In vectoring mode, a vector is taken as input, and the rotation directions are chosen so that the y coordinate of the vector approaches
CORDIC
Circuit that performs subtraction
Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous
Subtractor
American manufacturer of industrial tools and household hardware
CRC-Evans Pipeline International. CRC-Evans provides total project support for pipeline construction contractors with automatic welding and other pipeline construction
Stanley_Black_&_Decker
Airport serving Portland, Oregon, US
tanks, connected to the 14 inches (360 mm) Olympic pipeline and 8 inches (200 mm) Eugene pipeline, BNSF rail, truck, and ships. PassengersYear6,000,0009
Portland International Airport
Portland_International_Airport
Digital circuit that produces sums from inputs
Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous
Adder_(electronics)
Sequence in computer science
series. Prefix summation or partial summation form linear operators on the vector spaces of finite or infinite sequences; their inverses are finite difference
Prefix_sum
Message-passing system for parallel computers
gains by using MPI-IO. For example, an implementation of sparse matrix-vector multiplications using the MPI I/O library shows a general behavior of minor
Message_Passing_Interface
Voice conversion software
posteriorgram (PPG) encoder or self-supervised models like HuBERT; (2) a vector retrieval module that searches a target voice database for the most similar
Retrieval-based Voice Conversion
Retrieval-based_Voice_Conversion
Computer hardware technology
Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous
Trusted_Execution_Technology
Low-level shading language
(ARB) to standardize GPU instructions controlling the hardware graphics pipeline. Texas Instruments created the first programmable graphics processor in
ARB_assembly_language
Instruction set architecture
pre-fetching of the interrupt vector address. Reduces the number of interrupt service cycles by overlapping memory accesses with pipeline flushes and exception
MIPS_architecture
Translator library for raster and vector geospatial data formats
(GDAL) is a computer software library for reading and writing raster and vector geospatial data formats (e.g. shapefile), and is released under the permissive
GDAL
Type of artificial neural network
(e.g., spatial coordinates, time) to continuous outputs (i.e., scalars, vectors, etc.). This makes neural fields not only discretization independent, but
Neural_field
Data structure in computer board games
one instruction is available in the pipeline. Normal instruction sequences with branches may cause the pipeline to empty if a branch is mispredicted
Bitboard
Database management system
SingleStore stores relational data, JSON data, geospatial data, key-value vector data, and time series data. It can be run in various Linux environments
SingleStore
Overview of and topical guide to machine learning
k-nearest neighbors algorithm Kernel methods for vector output Kernel principal component analysis Learning vector quantization Leabra Linde–Buzo–Gray algorithm
Outline_of_machine_learning
Apple-branded microprocessor
see the need back then for the Vector Processing Unit. Ultimately, the G4 architecture design contained a 128-bit vector processing unit labelled AltiVec
PowerPC_G4
processor able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high
FR-V_(microprocessor)
Combinational digital circuit
to accelerate complex operations. In such systems, the ALUs are often pipelined, with intermediate results passing through ALUs arranged like a factory
Arithmetic_logic_unit
VECTOR PIPELINE
VECTOR PIPELINE
Boy/Male
American, British, Christian, Danish, Dutch, English, Finnish, French, German, Greek, Hindu, Indian, Irish, Jamaican, Latin, Romanian, Slovenia, Spanish, Swedish, Swiss, Tamil, Ukrainian
Victorious; Conqueror; Winner; Champion; One who Conquers; Victory
Boy/Male
Christian & English(British/American/Australian)
Conqueror
Boy/Male
Christian & English(British/American/Australian)
Steadfast
Male
Scandinavian
 Scandinavian form of Roman Latin Victor, VIKTOR means "conqueror." Compare with another form of Viktor.
Boy/Male
Australian, Basque, Czech, Czechoslovakian, Danish, Finnish, French, German, Hungarian, Latin, Polish, Slovenia, Swedish, Swiss, Ukrainian
The Conqueror; Victory; Victorious; Conquer
Boy/Male
Spanish American Shakespearean Greek Latin
Tenacious.
Boy/Male
Spanish
Victor.
Male
Portuguese
Portuguese form of Latin Hector, HEITOR means "defend; hold fast."
Boy/Male
English American
Doctor; teacher.
Boy/Male
Arthurian Legend
Father of Arthur.
Male
Portuguese
Galician-Portuguese form of Roman Latin Victor, VITOR means "conqueror."
Male
Arthurian
, sir Hector de Maris; (defender).
Surname or Lastname
Scottish
Scottish : Anglicized form of the Gaelic personal name Eachann (earlier Eachdonn, already confused with Norse Haakon), composed of the elements each ‘horse’ + donn ‘brown’.English : found in Yorkshire and Scotland, where it may derive directly from the medieval personal name. According to medieval legend, Britain derived its name from being founded by Brutus, a Trojan exile, and Hector was occasionally chosen as a personal name, as it was the name of the Trojan king’s eldest son. The classical Greek name, HektÅr, is probably an agent derivative of Greek ekhein ‘to hold back’, ‘hold in check’, hence ‘protector of the city’.German, French, and Dutch : from the personal name (see 2 above). In medieval Germany, this was a fairly popular personal name among the nobility, derived from classical literature. It is a comparatively rare surname in France.
Male
English
 Anglicized form of Scottish Gaelic Eachann, HECTOR means "brown horse." Compare with another form of Hector.
Male
English
Roman Latin name VICTOR means "conqueror."Â
Boy/Male
American, Australian, British, Chinese, Christian, Danish, Dutch, English, French, German, Greek, Italian, Latin, Portuguese, Shakespearean, Spanish
Steadfast; Anchor; Holds Fast; Star; Coined from Esther Vanhomrigh; Tenacious; Defend; Hold Fast; Coined from Esther Vanho
Male
Russian
(Cyrillic Виктор): Slavic form of Roman Latin Victor, VIKTOR means "conqueror." In use by the Bulgarians, Russians and Serbians. Compare with another form of Viktor.
Male
English
Short form of English Sylvester, VESTER means "from the forest."
Boy/Male
Latin American Spanish
Conqueror.
Male
Greek
(á¼ÎºÏ„ωÏ) Variant spelling of Greek Hektor, EKTOR means "defend; hold fast."
VECTOR PIPELINE
VECTOR PIPELINE
Boy/Male
Celebrity, Hindu, Indian, Kannada, Tamil, Telugu
Youthful
Girl/Female
Indian
Its meaning is her father
Girl/Female
English American
A feminine form of Gerald, meaning ruling spear. Famous bearer: The Earl of Surrey wrote a...
Boy/Male
Hindu
Reflection
Girl/Female
Australian, Irish
Sweet
Boy/Male
Armenian, Hindu, Indian, Kannada, Punjabi, Sikh, Telugu
Gentle
Boy/Male
Muslim/Islamic
Righteous mature
Boy/Male
Muslim
Lion
Boy/Male
Hindu
Lord Jagannath and Lord Indra, Lord Shiva
Surname or Lastname
English
English : habitational name from Satterleigh in Devon, named in Old English with sǣtere ‘robbers’ + lēah ‘clearing in a wood’.
VECTOR PIPELINE
VECTOR PIPELINE
VECTOR PIPELINE
VECTOR PIPELINE
VECTOR PIPELINE
n.
Same as Radius vector.
n.
The chief elective officer of some universities, as in France and Scotland; sometimes, the head of a college; as, the Rector of Exeter College, or of Lincoln College, at Oxford.
v. t.
To tamper with and arrange for one's own purposes; to falsify; to adulterate; as, to doctor election returns; to doctor whisky.
a.
Pertaining to a rector or a rectory; rectoral.
n.
The ratio of one vector to another in length, no regard being had to the direction of the two vectors; -- so called because considered as a stretching factor in changing one vector into another. See Versor.
n.
The province of a rector; a parish church, parsonage, or spiritual living, with all its rights, tithes, and glebes.
n.
An astronomical instrument, the limb of which embraces a small portion only of a circle, used for measuring differences of declination too great for the compass of a micrometer. When it is used for measuring zenith distances of stars, it is called a zenith sector.
n.
A pregnant woman; a mother; as, A has a son B by one venter, and a daughter C by another venter; children by different venters.
n.
A mathematical instrument, consisting of two rulers connected at one end by a joint, each arm marked with several scales, as of equal parts, chords, sines, tangents, etc., one scale of each kind on each arm, and all on lines radiating from the common center of motion. The sector is used for plotting, etc., to any scale.
n.
An African weaver bird (Textor alector).
n.
A term made up of the two parts / + /1 /-1, where / and /1 are vectors.
n.
A directed quantity, as a straight line, a force, or a velocity. Vectors are said to be equal when their directions are the same their magnitudes equal. Cf. Scalar.
n.
Any mechanical contrivance intended to remedy a difficulty or serve some purpose in an exigency; as, the doctor of a calico-printing machine, which is a knife to remove superfluous coloring matter; the doctor, or auxiliary engine, called also donkey engine.
n.
A woman who wins a victory; a female victor.
v. t.
To confer a doctorate upon; to make a doctor.
a.
Of or pertaining to victory, or a victor' being a victor; bringing or causing a victory; conquering; winning; triumphant; as, a victorious general; victorious troops; a victorious day.
v. t.
To treat as a physician does; to apply remedies to; to repair; as, to doctor a sick man or a broken cart.
n.
A contrivance for removing superfluous ink or coloring matter from a roller. See Doctor, 4.
n.
A belly, or protuberant part; a broad surface; as, the venter of a muscle; the venter, or anterior surface, of the scapula.
n.
The turning factor of a quaternion.