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Search references for X87. Phrases containing X87
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Subset of x86 instruction set architecture for floating-point arithmetic
x87 is a floating-point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form
X87
List of x86 microprocessor instructions
instructions provided by x87 obey PC and RC. x87 coprocessors (other than the 8087) handle exceptions in a fairly unusual way. When an x87 instruction generates
List_of_x86_instructions
Intel SIMD processor supplementary instruction sets introduced by Intel
switching penalty for issuing x87 (floating point) instructions present in MMX because it is sharing register space with the x87 floating point unit (FPU)
SSE2
64-bit extension of x86 architecture
supported through mandatory SSE2 instructions in 64-bit mode. While the older x87 FPU and MMX registers are still available, they are generally superseded
X86-64
Family of instruction set architectures
integrated this x87 functionality on chip which made the x87 instructions a de facto integral part of the x86 instruction set. Each x87 register, known
X86
Set of x86 processor instructions
allow basic arithmetic using a decimal numeral system. In addition, the x87 part supports a unique 18-digit (ten-byte) BCD format that can be loaded
Intel_BCD_opcodes
Part of a computer system
independent clocking schemes. CORDIC routines have been implemented in Intel x87 coprocessors (8087, 80287, 80387) up to the 80486 microprocessor series,
Floating-point_unit
Instruction set designed by Intel
aliases for the existing x87 floating-point unit (FPU) registers, which context switches would already save and restore. Unlike the x87 registers, which behave
MMX_(instruction_set)
Processor register which changes or controls the general behavior of a CPU
Put simply, if the X87 state was enabled in XCR0 and PT state was enabled in IA32_XSS, the XSAVE instruction would only store X87 state, while the privileged
Control_register
Data structure in microprocessors
detected in the x87 FPU, it is not signalled as a fault on the x87 instruction producing the exception, but instead on the next x87/FWAIT/MMX instruction
Interrupt_descriptor_table
IEEE standard for floating-point arithmetic
extended precision binary number must have an 'emax' of at least 16383. The x87 80-bit extended format meets this requirement. The original IEEE 754-1985
IEEE_754
Floating-point microprocessor
The available speed version were 4.77 (5), 8, and 10 MHz. There were later x87 coprocessors for the 80186, 80286, 80386, 80386SX and also 80486SX processors
Intel_8087
Extension to the x86 instruction set by AMD
the standard x87 FPU, 3DNow! instructions and x87 instructions cannot be executed simultaneously. However, because it is aliased to the x87 FPU, the 3DNow
3DNow!
Calling conventions used in x86 architecture programming
values are put in the ST0 x87 register. Registers EAX, ECX, and EDX are caller-saved, and the rest are callee-saved. The x87 floating point registers ST0
X86_calling_conventions
Obsolete keyword in the Java programming language
avoid the use of extended precision on x86 machines with the traditional x87 floating-point architecture. Although it was easy to control calculation
Strictfp
Abstract data type
the CISC HP 3000 machines and the CISC machines from Tandem Computers. The x87 floating-point architecture is an example of a set of registers organised
Stack_(abstract_data_type)
Line of CPUs designed for small size and low power consumption
supported) Supports i586 instruction set, without x87. Supports i586 instruction set, without x87. Intel Quark SoC X1000 contains a bug (#71538) that
Intel_Quark
Computer-aided design and drafting software
and DOS (386) Release 13 SunOS 4.1 and Ultrix Release 12 DOS (286) Release 11 Xenix and OS/2 1.x Release 10 DOS (sans-x87) 2.6 CP/M-80 and CP/M-86 1.4
AutoCAD
Fundamental trigonometric functions
architectures have a built-in instruction for sine, including the Intel x87 FPUs since the 80387. In programming languages, sin and cos are typically
Sine_and_cosine
i586 instruction set without x87) 2015: Atlas Peak (Quark SE C1000, microcontroller at 32 MHz. i586 instruction set without x87) 2017: Sue Creek (Quark S1000
List_of_Intel_processors
64-bit computer number format
to bring extra precision in intermediate computations for platforms like x87. Thus a modifier strictfp was introduced to enforce strict IEEE 754 computations
Double-precision floating-point format
Double-precision_floating-point_format
196-pin PQFP, 208-pin SQFP Architecture and classification Technology node 0.6 μm to 0.35 μm Instruction set x86-16, IA-32 including x87 (except for U5SD)
UMC_Green_CPU
Floating-point number formats
Kahan, a primary designer of the x87 arithmetic and initial IEEE 754 standard proposal notes on the development of the x87 floating point: "An extended format
Extended_precision
C programming language standard, 1999 revision
expressions (see IEEE 754 design rationale) and is the designed default method for x87 hardware, but yields unintuitive behavior for the unwary user; FLT_EVAL_METHOD
C99
Intel microprocessor
the 80486; it also allows faster access and storage of 64-bit and 80-bit x87 FPU data. Internally, this CPU process the data at 32 bits wide. The external
Pentium_(original)
Paulista X74 Campo dos Amarais Observatory SP Observatorio Campo dos Amarais X87 Dogsheaven Observatory DF Dogsheaven Observatory, Brasília X88 Adhara Observatory
List_of_observatory_codes
Form of inter-process communication in computer systems
pushing when it is full). It is defined by, but not used on Linux, where a x87 coprocessor stack fault will generate SIGFPE instead. SIGUNUSED The SIGUNUSED
Signal_(IPC)
Working storage in a computer processor
all general purpose registers worked directly with the decoder, and the x87 push stack was located within the floating-point unit itself. Starting with
Register_file
Measure of computer performance
Intel 80486 x87 (80-bit) ? 0.128 ? Intel P5 Pentium Intel P6 Pentium Pro x87 (80-bit) ? 0.5 ? Intel P5 Pentium MMX Intel P6 Pentium II x87 (80-bit) ? 1
Floating point operations per second
Floating_point_operations_per_second
64-bit vectors, operating on mm0..mm7 registers (aliased on top of the old x87 register file) SSE2: 128-bit vectors, operating on xmm0..xmm15 registers
List_of_x86_SIMD_instructions
AMD brand for microprocessors
DDR4–2133 ×8 single rank, or DDR4–1866 ×8 dual rank. Instructions sets: x87, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, CLMUL, AVX, AVX2, FMA3
Ryzen
American microprocessor developer
the 386DX. The first Cyrix product for the personal computer market was a x87 compatible FPU coprocessor. The Cyrix FasMath 83D87 and 83S87 were introduced
Cyrix
Computer chip instruction set extension
the MMX instruction set. MMX had two main problems: it re-used existing x87 floating-point registers making the CPUs unable to work on both floating-point
Streaming_SIMD_Extensions
Synergetic: EC-1 Pixelworks: PW164 CAST — offered synthesizable x86 and x87 IP cores for use in ASICs and FPGAs, such as the C80186XL, C80187, and C387L
List_of_x86_manufacturers
System of digitally encoding numbers
than the digit in the low half-byte. […] When operating on BCD integers in x87 FPU data registers, BCD values are packed in an 80-bit format and referred
Binary-coded_decimal
CPU by AMD
faster for general-purpose computing, while the Intel part was faster in x87 floating-point applications. To battle the Pentium II's dominance on floating
AMD_K6-2
Operation common in numerical signal processing
of FMA. This behavior is also comparable to using FLT_EVAL_METHOD == 2 on x87. Compound operator "The Feasibility of Ludgate's Analytical Machine". Archived
Multiply–accumulate_operation
Type of computer
instruction set for most operations, but use stack instructions for its x87, Intel 8087 floating point arithmetic, dating back to the iAPX87 (8087) coprocessor
Stack_machine
Brand of microprocessors by AMD
technology.[citation needed] AMD ended its long-time handicap with floating point x87 performance by designing a super-pipelined, out-of-order, triple-issue floating-point
Athlon
Lossy audio coding format
with the analysis on files with digital silence (all zeros), especially on x87 builds (mostly affects 32-bit builds). It also includes two new features:
Opus_(audio_format)
Line of desktop and mobile microprocessors produced by Intel
existing 64-bit data paths and by merging the SIMD-FP multiplier unit with the x87 scalar FPU multiplier into a single unit. To utilize the existing 64-bit
Pentium_III
Replacing a number with a simpler value
machines; special programming tricks have had to be used to achieve this with x87 floating point. The Java language was changed to allow different results
Rounding
First edition of the IEEE 754 floating-point standard
specifies minimum precision and exponent requirements for such formats. The x87 80-bit extended format is the most commonly implemented extended format that
IEEE_754-1985
Basal organ of a vascular plant
Forest Research. 17 (8): 761–767. Bibcode:1987CaJFR..17..761C. doi:10.1139/x87-122. Raven JA, Edwards D (2001). "Roots: evolutionary origins and biogeochemical
Root
Type of computer processor
mathematics functions (for example, trigonometric functions) like the Intel x87 family, and required specific software libraries to support their functions
Coprocessor
System information, diagnostics, and auditing program
processor's floating-point units in 80-bit precision calculations. Uses x87 instructions intended for trigonometric and exponential functions. The program
AIDA64
Realtime physics engine software
analysis, most of the code used in PhysX applications at the time was based on x87 instructions without any multithreading optimization. This could cause significant
PhysX
Floating-point data type in C family languages
rather than long double. Although the x86 architecture, and specifically the x87 floating-point instructions on x86, supports 80-bit extended-precision operations
Long_double
Successor to the Intel 386
classification Technology node 1 μm to 600 nm Instruction set x86-16, IA-32 including x87 (except for "SX" models) History Predecessor Intel 386 Successors Pentium/i586
I486
SSE/MMX: 4 bytes /w prefix AVX: 8 Bytes /w prefix) Condition code Little x87, IA-32, MMX, 3DNow!, SSE, SSE2, PAE, x86-64, SSE3, SSSE3, SSE4, BMI, AVX
Comparison of instruction set architectures
Comparison_of_instruction_set_architectures
CPU instruction set
for complex numbers and wave calculation like sound. FISTTP Like the older x87 FISTP instruction, but ignores the floating point control register's rounding
SSE3
Computer approximation for real numbers
special values and exceptions), though the extended internal precision of x87 means it requires explicit rounding of exact results directly to the destination
Floating-point_arithmetic
Family of Intel microprocessors
web}}: CS1 maint: deprecated archival service (link) See Wikipedia article on X87 Performance Brown, Rich (2005-11-23). "CNET Prizefight: AMD vs. Intel dual-core
Pentium_D
Computer processor contained on an integrated-circuit chip
and the 80387 works with the 80386. The combination of an x86 CPU and an x87 coprocessor forms a single multi-chip microprocessor; the two chips are programmed
Microprocessor
Aspect of Java programming language
which may not correspond to the underlying hardware implementation. On the x87 floating point subset, Java since 1.4 does argument reduction for sin and
Java_performance
Microprocessor
coprocessors did not keep the x89 designation the way math coprocessors kept the x87 designation. It was used in the Apricot PC and the Intel Multibus iSBC-215
Intel_8089
Root-finding algorithm
processing power lagged the speed of integer processing. In particular the x87 instruction set was very slow at the time compared to modern SSE operations
Fast_inverse_square_root
Denormalized floating-point numbers near zero
signal processing applications" (PDF). Casey, Shawn (16 October 2008). "x87 and SSE Floating Point Assists in IA-32: Flush-To-Zero (FTZ) and Denormals-Are-Zero
Subnormal_number
American semiconductor company
coprocessor; an optional Nx587 provided this functionality. In later Nx586s, an x87 math coprocessor was included on-chip. Using IBM's multichip module (MCM)
NexGen
Embedding assembly in a high-level language
language shows code that computes the tangent of x using the x86's FPU (x87) instructions. // Compute the tangent of x real tan(real x) { asm { fld x[EBP]
Inline_assembler
Quickly accessible working storage available as part of a digital processor
incompatible with x86; however, it contains an 80-bit floating-point unit that is x87-compatible. PIC microcontroller 001 000 The base PIC architecture has no
Processor_register
Spreadsheet software
support, better memory management, and expanded memory support, supports x87 math coprocessors, and the Lotus International Character Set (LICS). Introduced
Lotus_1-2-3
Genus of snakes
identifiers Antaresia Wikidata: Q866457 Wikispecies: Antaresia AFD: Antaresia CoL: X87 EoL: 41352 GBIF: 2465002 iNaturalist: 32137 IRMNG: 1297669 ITIS: 634407 NCBI:
Antaresia
Family of backward-compatible assembly languages
the .intel_syntax directive. A quirk in the AT&T syntax for x86 is that x87 floating-point operands are reversed, an inherited bug from the original
X86_assembly_language
Topics referred to by the same term
NPX or npx could refer to: The Numeric Processor Extension in x87 npx, a command in npm Santa Cruz language, an Austronesian language spoken in the Solomon
NPX
Computer architecture bit width
not always, based on 64-bit units of data. For example, although the x86/x87 architecture has instructions able to load and store 64-bit (and 32-bit)
64-bit_computing
Computer program
future as an overclocking benchmark.[citation needed] Super PI utilizes x87 floating point instructions which are supported on all x86 and x86-64 processors
Super_PI
Instruction for x86 microprocessors
Pentium 4) only. FCMOV and FCOMI instructions only available if onboard x87 FPU also present (indicated by EDX bit 0). ECX bit 16 is listed as "Reserved"
CPUID
Brand by Intel
the time), as expected. But in legacy applications with many branching or x87 floating-point instructions, the Pentium 4 would merely match or run slower
Pentium_4
Cyrix x86 microprocessor
486SX, it had no on-board x87 math coprocessor, but unlike the 486SX, it could make use of an Intel i287, 387SX or compatible x87 coprocessor. Due to the
Cyrix_Cx486SLC
Microarchitecture by AMD
one of the integer cores dispatches AVX instruction and two symmetrical x87/MMX/SSE capable FPPs for backward compatibility with SSE2 non-optimized software
Bulldozer_(microarchitecture)
Machine instruction that indicates to a computer to do nothing
0x84 0x00 0x00 0x00 0x00 0x00 is [EAX + EAX*1 + 00000000H] FNOP 2 0xD9 0xD0 x87 floating-point coprocessor no-operation Intel 8008 LAA 1 0xC0 Load A from
NOP_(code)
API used in Microsoft DirectX for 3D rendering
multitexture and stencil buffers) as well as optimized geometry pipelines for x87, SSE and 3DNow! and optional texture management to simplify programming.
Direct3D
Motor vehicle
Juniors used the X86 chassis from the Dyna X 120 while later models used the X87 chassis from the Dyna X 130. This platform gave the Junior a wheelbase of
Panhard_Dyna_Junior
Cyrix x86 microprocessor
unlike the 486SX, it can make use of an Intel 387DX or compatible numeric x87 coprocessor. Due to the smaller L1 cache, the 486DLC can not compete on a
Cyrix_Cx486DLC
Computer operating on base-10 numbers
now slower than using 32-bit or wider BCD "tricks" to compute in BCD. The x87 FPU has instructions to convert 10-byte (18 decimal digits) packed decimal
Decimal_computer
Company focusing on computer software
call floating point libraries to do computations instead of placing inline x87 instructions inline with the 8088's instructions that allowed the 8088 to
Hauppauge_Computer_Works
Part of a series on x86 instruction listings Main (integer, system, x87) SIMD (MMX, SSE, AVX, FMA, AMX) Virtualization (VT-x, AMD-V, TDX) Cryptographic
List of discontinued x86 instructions
List_of_discontinued_x86_instructions
Village in British Columbia
(MM169). Public Schools annual report, 1956–57. library.ubc.ca (Report). p. X87. "Ashcroft-Cache Creek Journal". www.ashcroftcachecreekjournal.com. 8 Apr
Ashcroft,_British_Columbia
486-compatible microprocessor by Cyrix
specifications through use of an accessory, the Cyrix Cx487S which was an x87 Floating Point Unit coprocessor which fit between the CPU and the socket
Cyrix_Cx486
Racing yacht class
1947 X83 SEAMIST 1947 X84 NANETTE 1947 X85 HARLEQUIN 1947 X86 AORA 1947 X87 EXCALIBUR 1948 X88 TING HOW 1948 X89 JINX 1948 X90 CALYPSO 1949 X91 ASTRALITA
XOD
American chip-design company
such as the 3170 and 3172. Weitek FPUs had several differences compared to x87 offerings, lacking extended double precision but having a register-file rather
Weitek
Part of a series on x86 instruction listings Main (integer, system, x87) SIMD (MMX, SSE, AVX, FMA, AMX) Virtualization (VT-x, AMD-V, TDX) Cryptographic
List of x86 virtualization instructions
List_of_x86_virtualization_instructions
Synthetic benchmark for evaluating the performance of computers
"Whetstone utilizes the complete set of instructions available on early x87 FPUs". This might suggest that the Whetstone Benchmark influenced the hardware
Whetstone_(benchmark)
stack. One common reason to test the parity flag is to check an unrelated x87-FPU flag. The FPU has four condition flags (C0 to C3), but they can not be
Parity_flag
Early floating-point math coprocessor
stark contrast to Intel's succeeding, in-house designed 8087 (and other x87 family) FPUs which were tightly bound to the x86 CPU line. For example, the
Intel_8231/8232
Instruction set architecture extension for microprocessors
encoding of three SIMD registers (XMM, YMM, or ZMM) as source operands (MMX or x87 registers are not supported); Compacted REX prefix for 64-bit mode; Compacted
EVEX_prefix
Lehmer, D. H. Number Sieve Machine using 16 mm film. Computer History Museum. X87.82. Retrieved 13 June 2026. Lehmer, D. H.; Morton, Paul. Delay line number
Lehmer_sieve
Both barquette and berlinette versions of the X86 were built. Monopole X87 The X87 series embodied by the Dyna 130 received an engine of 848 cc (51.7 cu in)
Monopole_(company)
Part of a series on x86 instruction listings Main (integer, system, x87) SIMD (MMX, SSE, AVX, FMA, AMX) Virtualization (VT-x, AMD-V, TDX) Cryptographic
List of x86 cryptographic instructions
List_of_x86_cryptographic_instructions
21st 24 Hours of Le Mans endurance race
Automobiles Panhard et Levassor Raymond Stempert Georges Schwartz Panhard X87 Panhard 851cc F2 218 23 S 750 53 R.N.U. Renault Jean-Louis Rosier Robert
1953_24_Hours_of_Le_Mans
Former government agency in the UK
" Whetstone utilizes the complete set of instructions available on early x87 FPUs". This might suggest that the Whetstone Benchmark influenced the hardware
Central Computer and Telecommunications Agency
Central_Computer_and_Telecommunications_Agency
French coachbuilder
André. "Pichon Parat". leroux.andre.free.fr (in French). "1955 Panhard X87 — Pichon Parat Dolomites". Classic Driver. 1 June 2021. JPB (28 January 2016)
Pichon-Parat
Bus station in Newcastle upon Tyne, England
Kenton Bar, Kingston Park , Woolsington, Newcastle Airport & Ponteland X87 Newbiggin Hall express via Cowgate & Blakelaw X88 J 49 Newcastle Great Park
Eldon_Square_bus_station
Human settlement in England
The main buses are the 88 & 89 to Winterslow, although there is also an X87. "Pitton and Farley (Parish) - Population Density, 2011". Office for National
Pitton
American ecologist
respiration". Canadian Journal of Forest Research. 17 (4): 330–333. doi:10.1139/x87-055. ISSN 0045-5067. Gholz, H. L. (1987-08-31). Agroforestry: Realities,
Katherine_Ewel
X87
X87
X87
X87
Girl/Female
Muslim/Islamic
Successful
Surname or Lastname
English and Dutch
English and Dutch : from the Germanic byname mentioned at Ernst. However, Reaney cites medieval evidence for Norman spellings such as Ernais, and derives it from a Germanic personal name Arn(e)gis, possibly composed of the elements arn ‘eagle’ + gīsil ‘pledge’, ‘hostage’, ‘noble youth’ (see Giesel). The name may have been altered by folk etymology to coincide with the word meaning ‘combat’. Compare Harness.Dutch : variant of Ernst.
Girl/Female
English
Derived from Mary, meaning bitter. Mary was the biblical mother of Christ. Often used as English...
Girl/Female
Gujarati, Hindu, Indian, Malayalam, Marathi, Sanskrit, Tamil, Telugu
Giver of Freedom
Boy/Male
Muslim
To help
Boy/Male
Tamil
Sonakshay | ஸோநாகà¯à®·à®¯
Boy/Male
Indian, Punjabi, Sikh
Right World
Boy/Male
Tamil
Kumarabrahmacharin | கà¯à®®à®¾à®‚ராபà¯à®°à®¹à¯à®®à®¾à®šà®¾à®°à¯€à®¨
Youthful bachelor
Boy/Male
British, English
From the Soldier's Land
Girl/Female
Muslim/Islamic
Noble respectful
X87
X87
X87
X87
X87