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Search references for CPUID. Phrases containing CPUID
See searches and references containing CPUID!CPUID
Instruction for x86 microprocessors
In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from "CPU Identification")
CPUID
Processor microarchitecture
as CPUID family 6 model 22. In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model
Intel Core (microarchitecture)
Intel_Core_(microarchitecture)
List of x86 microprocessor instructions
observed to have the CPUID feature bit for CLDEMOTE set, while several of them have the CPUID bit cleared. As of April 2023, the CPUID feature bit for CLDEMOTE
List_of_x86_instructions
Freeware system profiling and monitoring application for Microsoft Windows and Android
CPU-Z is a freeware system profiling and monitoring software developed by CPUID. It provides information about central processing unit, RAM, motherboard
CPU-Z
SIMD CPU instruction set
shrink of Intel's Core microarchitecture. Support is indicated via the CPUID.01H:ECX.SSE41[Bit 19] flag. SSE4.2 added STTNI (String and Text New Instructions)
SSE4
the Family 0Fh processors. 10h and 0Fh refer to the main result of the CPUID x86 processor instruction. In hexadecimal numbering, 0F(h) (where the h
List of AMD CPU microarchitectures
List_of_AMD_CPU_microarchitectures
Intel microprocessor family
P-cores and E-cores on early versions of Alder Lake CPUs reported different CPUID models.[citation needed] This has caused issues with digital rights management
Alder_Lake
Status register of x86 architecture
processor is earlier than the 486. Starting with the Intel Pentium, the CPUID instruction reports the processor model. However, the above method remains
FLAGS_register
CPU microarchitecture by Intel
micro-operation cache hit or miss Supervisor Mode Execution Prevention CPUID Faulting support The built-in GPU has 6 or 16 execution units (EUs), compared
Ivy Bridge (microarchitecture)
Ivy_Bridge_(microarchitecture)
Control registers in some x86 processors
to access current and future "model-specific registers", as well as the CPUID instruction to determine which features are present on a particular model
Model-specific_register
Family of Intel microprocessors
Physical Address Extension (PAE) but do not show the PAE support flag in their CPUID information; this causes some operating systems (primarily Linux distributions)
Pentium_M
Upcoming microprocessor family by Intel
information Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code Unknown Product code Unknown Physical specifications GPU Intel Arc
Nova_Lake_(microprocessor)
Instruction set extension by Intel
instruction set consists of several separate sets each having their own unique CPUID feature bit. However, they are typically grouped by the processor generation
AVX-512
CPU by AMD
by setting the motherboard clock multiplier to 2. Package number: 26050 CPUID: Family 5, Model 8, Stepping 0 L1-Cache: 32 + 32 KiB (Data + Instructions)
AMD_K6-2
64-bit x86 register
can solve this problem by inserting a serializing instruction, such as CPUID, to force every preceding instruction to complete before allowing the program
Time_Stamp_Counter
Family of x86-compatible microprocessors
Photo of CPUID for Transmeta Crusoe TM5800 800 MHz on Fujitsu P2040
Transmeta_Crusoe
Instructions for the x86 microprocessors
processor microarchitecture. This is a separate extension using its own CPUID flag, described on its own page and not below. Intel Haswell processors
Advanced_Vector_Extensions
Intel processor microarchitecture
four cores report the same CPUID model 0206A7h and are closely related. The stepping number cannot be seen from the CPUID but only from the PCI configuration
Sandy_Bridge
Intel microprocessor
documentation from Intel, "although this processor has a CPUID of 163xh, it uses a Pentium II processor CPUID 065xh processor core." The 0.25 μm Tonga core was
Pentium_II
Microprocessor developed by Intel
queried by the CPUID command. As noted in the Pentium II Processor update documentation from Intel, "although this processor has a CPUID of 163xh, it uses
Pentium_OverDrive
Line of Intel server and workstation processors
otherwise used for processors with QPI but no DMI or PCI Express links. The CPUID code of both Lynnfield and Jasper forest is 106Ex, i.e., family 6, model
Xeon
Computer instruction for returning hardware-generated random numbers
instruction rdseed are available with Intel Broadwell CPUs and AMD Zen CPUs. The CPUID instruction can be used on both AMD and Intel CPUs to check whether the
RDRAND
2007 CPU microarchitecture by Intel
"Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23. In Core 2 processors, it is used with the code names Penryn (Socket
Penryn_(microarchitecture)
Code name for various mobile Intel processors
a smaller L2 cache. Merom-L has only one processor core and a different CPUID model. The desktop version of Merom is Conroe and the dual-socket server
Merom_(microprocessor)
only publicly documented by Intel with the release of the Pentium Pro. The CPUID instruction can be used to identify the availability of PSE on x86 CPUs
Page_Size_Extension
Family of instruction set architectures
instruction set architectures x86 calling conventions x86 instruction listings CPUID 680x0, a competing architecture in the 16-bit and early 32-bit eras PowerPC
X86
Code name for several Intel processors
have a smaller L2 cache. Conroe-L has only one processor core and a new CPUID model. The mobile version of Conroe is Merom, the dual-socket server version
Conroe_(microprocessor)
high-end server and supercomputer microprocessor. Steppings: C0, C1 and C2. CPUID: 0007000604h (stepping C0), 0007000704h (stepping C1) or 0007000804h (stepping
List of Intel Itanium processors
List_of_Intel_Itanium_processors
Part of a machine instruction
copying, logical operations, program control, and special instructions (e.g., CPUID). In addition to the opcode, many instructions specify the data (known as
Opcode
Intel processor microarchitecture
("Banias") internally support PAE but do not show the PAE support flag in their CPUID information; this causes some operating systems (primarily Linux distributions)
P6_(microarchitecture)
Extension to the x86 instruction set
tests) despite not being officially supported and not even reported by CPUID. This has also been confirmed by Agner Fog. But other tests gave wrong results
FMA_instruction_set
Line of CPUs produced by Intel
original U2xxx series "Merom-L" used a special version of the Merom chip with CPUID number 10661 (model 22, stepping A1) that only had a single core and was
Intel_Core
CPU made by Intel
memory and bus interface. The product code for Lynnfield is 80605, its CPUID value identifies it as family 6, model 30 (0106Ex). Lynnfield is related
Lynnfield_(microprocessor)
CPU microarchitecture
the Family 0Fh processors. 10h and 0Fh refer to the main result of the CPUID x86 processor instruction. In hexadecimal numbering, 0F(h) (where the h
AMD_K8
Security-related instruction code processor extension
the Skylake microarchitecture. Support for SGX in the CPU is indicated in CPUID "Structured Extended feature Leaf", EBX bit 02, but its availability to
Software_Guard_Extensions
Operating mode for x86 CPUs
are supported modes when the processor is not in long mode. A bit in the CPUID extended attributes field informs programs in real or protected modes if
Long_mode
Series of x86-compatible processor
processors in 2019. Rebranded Cyrix MediaGXm. Returns "CyrixInstead" on CPUID. 0.35 μm four-layer metal CMOS MMX instructions Core speed: 180, 200, 233
Geode_(processor)
Extension for x86 processors
enabled by the BMI bit in CPUID. Intel officially considers LZCNT as part of BMI, but advertises LZCNT support using the ABM CPUID feature flag. BMI1 is available
X86 Bit manipulation instruction set
X86_Bit_manipulation_instruction_set
Official open-source package manager for Windows 10/11
Stephen Gillie (August 27, 2024). "[Package Request]: Add ARM64 Version of CPUID.CPU-Z". winget-pkgs. Retrieved 6 September 2025. "GitHub - microsoft/winget-cli:
Windows_Package_Manager
Intel computer processor
microarchitecture, the shrink of the Merom microarchitecture to 45 nanometers as CPUID model 23. This replaced the Conroe processor with Wolfdale. The Wolfdale
Wolfdale_(microprocessor)
Memory management feature
also support PAE; however, they do not show the PAE support flag in their CPUID information. This was remedied in a later revision of the "Dothan" core
Physical_Address_Extension
Code name for some Intel processors
microarchitecture, the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23, replacing Kentsfield, the previous model. Like its predecessor
Yorkfield
Compiler
led to misleading benchmarks, including one incident when changing the CPUID of a VIA Nano significantly improved results. In November 2009, AMD and
Intel_C++_Compiler
Computer microprocessor
1997 VCore: 2.9 V (166/200) 3.2/3.3 V (233) Clockrate: 166, 200, 233 MHz CPUID: family 5, model 7, stepping 0 8.8 million transistors in 250 nm L1-Cache:
AMD_K6
Intel computer processor
die and memory controller die resulted in increased memory latency. The CPUID for Clarkdale is family 6, model 37 (2065x). The mobile equivalent of Clarkdale
Clarkdale_(microprocessor)
Line of Intel microprocessors released in 2022
20, 2022) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code B0671 Product code 80715 Performance Max. CPU clock rate Up to 6.2
Raptor_Lake
Processor product line
is closely related to the dual-processor Gainestown, which has the same CPUID value of 0106Ax (family 6, model 26) and which uses the same socket. Bloomfield
Bloomfield_(microprocessor)
must be determined by using CPUID to query the maximum physical-address width supported by the processor by invoking CPUID with function 80000008H and
PSE-36
2019 AMD 7-nanometer processor microarchitecture
extensions: WBNOINVD, CLWB, RDPID, RDPRU, MCOMMIT. Each instruction uses its own CPUID bit. Hardware mitigations against the Spectre V4 speculative store bypass
Zen_2
Microprocessor
the chip identified itself as an 80486 and disabled the CPUID instruction by default. CPUID support could be enabled by first enabling extended CCR registers
Cyrix_6x86
Computer vulnerability using speculative execution
(CPUID 806EC) Cascade Lake stepping 5 Ice Lake Xeon-SP (CPUID 606A*) Comet Lake U42 Amber Lake (CPUID 806EC) Cascade Lake Ice Lake Core family (CPUID 706E5)
Transient execution CPU vulnerability
Transient_execution_CPU_vulnerability
Mobile processor from Intel
"Tick" of Intel's Tick-Tock cycle which shrunk Merom to 45 nanometers as CPUID model 23. The term "Penryn" is sometimes used to refer to all 45 nm chips
Penryn_(microprocessor)
2024 AMD 4-nanometer processor microarchitecture
2024; 19 months ago (2024-10-10) Designed by AMD Common manufacturer TSMC CPUID code Family 1Ah Performance Max. CPU clock rate 2.0 GHz to 5.7 GHz Physical
Zen_5
Hyperthreaded Intel processor
Dunnington six-core processor is a Socket 604 based multi-socket processor. The CPUID extended model number is 44 (2Ch) and two product codes are used, 80613
Gulftown
Intel microprocessor series released in 2023
2023 (2023-12-14) Marketed by Intel Designed by Intel Common manufacturers Intel TSMC CPUID code A06A4h Product code 80723 Performance Max. CPU clock rate P-cores:
Meteor_Lake
2017 AMD 14-nanometer processor microarchitecture
encrypted when written to DRAM. The SME feature is identified through a CPUID function and enabled through the SYSCFG MSR. Once enabled, page table entries
Zen_(first_generation)
CPU architecture
computer is viewed as having 32 or fewer instructions, where NOP, RESET, and CPUID type instructions are usually not counted by consensus due to their fundamental
Minimal instruction set computer
Minimal_instruction_set_computer
Brand of discontinued microprocessors produced by Intel
2 cores, 2 logical processors (4 on Pentium 3xx with hyper-threading), CPUID signature 206A7, family 6 (06h), model 42 (02Ah), stepping 7 (07h) bTranslation
Pentium
Eighth-generation Intel Core microprocessor family
(9th gen) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 0906eah, 0906ebh, 0906ech, 0906edh Product code 80684 Physical specifications
Coffee_Lake
Series of x86-compatible processor
information Launched February 20, 1997 Common manufacturer National Semiconductor CPUID code 440h (GX/GXi), 540h (GXm) Performance Max. CPU clock rate 120 MHz to
MediaGX
Series of 32 bit CISC microprocessors
responding to interrupts Exception handling There is no equivalent to the x86 CPUID instruction to determine what CPU or MMU or FPU is present. The Motorola
Motorola_68000_series
Optimized math routines developed by Intel
instruction set extensions, and at run-time a "master function" uses the CPUID instruction to select a version most appropriate for the current CPU. However
Math_Kernel_Library
X86-compatible system-on-a-chip
hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu tsc cx8 mmx up bogomips : 399.95 clflush
Vortex86
Sixth-generation x86 microprocessor by Intel
Discontinued 1998 Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 0F619h Product code 80521 Performance Max. CPU clock rate 150 MHz to
Pentium_Pro
Intel microprocessor
the software visible register and the processor state. New instructions: CPUID, CMPXCHG8B, RDTSC, RDMSR, WRMSR, RSM. Test registers TR0–TR7 and MOV instructions
Pentium_(original)
2022 AMD 5-nanometer processor microarchitecture
years ago (September 27, 2022) Designed by AMD Common manufacturer TSMC CPUID code Family 19h Physical specifications Cores Desktop: 4 to 16 HEDT: 24
Zen_4
1998 Microsoft operating system version
Consumer Page HID controls. Windows 98 also supports 3DNow!, SSE, and Extended CPUID (ECPUID with ACPI). Windows 98 introduced ACPI 1.0 support which enabled
Windows_98
Hardware that translates virtual addresses to physical addresses
also support a 1 GB page with two levels of paging and 30 bits of offset. CPUID can be used to determine if 1 GB pages are supported. In all three cases
Memory_management_unit
Line of desktop and mobile microprocessors produced by Intel
Serial Number (PSN). A Pentium III's PSN can be read by software through the CPUID instruction if this feature has not been disabled through the BIOS. On November
Pentium_III
Architectural instruction
RC. Support for these instructions is indicated by bit 29 of ECX after CPUID with EAX=1. AMD: Jaguar-based processors Puma-based processors "Heavy Equipment"
F16C
Processor extension for the x86-64 line of processors
2023. "4TH GEN AMD EPYC™ PROCESSOR ARCHITECTURE" (PDF). AMD. May 2024. "CPUID dump for 96-Core AMD Ryzen Threadripper PRO 7995WX (Storm Peak) Zen4". GitHub
Intel_5-level_paging
Series of CPUs by AMD
Mobile Processors" (Press release). 2002-11-19. Retrieved 2006-07-04. "CPUID.com - AMD K8 Architecture". 2004-02-18. Archived from the original on 2006-07-07
Athlon_64
Topics referred to by the same term
Maritime University of Panama User-mode Instruction Prevention (umip), a CPUID feature bit for the x86 architecture UMIP, a Proxy Mobile IPv6 implementation
UMIP
1998 microprocessor
Retrieved 3 November 2011. "x86, x64 Instruction Latency, Memory Latency and CPUID dumps". 22 October 2011. Retrieved 3 November 2011. Shvets, Gennadiy (8
MP6
Intel microprocessor, released in 2023
ago (2023-01-10) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 806F6 Product code 80713 Performance Max. CPU clock rate Up to 4.8
Sapphire_Rapids
Intel microprocessor family launched in 2019
September 2019 (2019-09) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 703E5 Product code 80689 Performance Max. CPU clock rate 4.1 GHz DMI
Ice_Lake_(microprocessor)
Versions of a processor of the same processor type
about their features, including stepping level. For example, executing CPUID instruction with the EAX register set to '1' on x86 CPUs will result in
Stepping_level
CPU microarchitecture by Intel
processors) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 0406e3h, 0506e3h Product code 80662 (mainstream and mobile Xeon E3)
Skylake_(microarchitecture)
Fifth generation of Intel Core processors
November 2018 Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 0306D4h Product code 80658 (mainstream desktop/mobile, Xeon E3) 80660
Broadwell_(microarchitecture)
Type of computer benchmarking tool
Ars Technica article, a VIA Nano gained significant performance after its CPUID changed to Intel. This was because Intel compilers create conditional code
PCMark
Family of x86 central processing units for personal computers
memory subsystem after its CPUID changed to Intel, hinting at the possibility that the benchmark software only checks the CPUID instead of the actual features
VIA_Nano
2020 AMD 7-nanometer processor microarchitecture
ago (November 5, 2020) Designed by AMD Common manufacturers TSMC GlobalFoundries CPUID code Family 19h Physical specifications Transistors 6.24 billion (1× CCD)
Zen_3
Topics referred to by the same term
India IBC Root Beer Indirect Branch Control, information returned by the CPUID instruction for the Intel Pentium and successors Inflammatory breast cancer
IBC
Codename CPUID Family CPU/APU Brand Name Trinity 15h AMD A-Series Series of Products (2nd Generation) Zambezi 15h AMD FX Series of Products Llano 12h
List of IOMMU-supporting hardware
List_of_IOMMU-supporting_hardware
Layer of hardware-level instructions or data structures
values such as denormal numbers, and special-purpose instructions such as CPUID. The PDP-8 is a family of 12-bit minicomputers that was launched Digital
Microcode
Microprocessor family released in 2016
ago (August 30, 2016) Discontinued October 9, 2020 (desktop processors) CPUID code 0806e9h, 0806eah, 0906e9h Product code 80677 Performance Max. CPU clock
Kaby_Lake
Intel processor microarchitecture
Discontinued 2009 Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 06Fx Product code 80562 Performance Max. CPU clock rate 0.09 GHz to
Kentsfield_(microprocessor)
Intel processor microarchitecture
4, 2013) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 0306C3h Product code 80646 (desktop LGA 1150) 80647 (mobile Socket
Haswell_(microarchitecture)
Type of microprocessor
processors send self-identifying information after reset; an on-demand cpuid was not invented yet). This is not the same as the NC# pin used to shut
I486SX
Family of Intel microprocessors
ago (2010-07-13) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 0F47h (Smithfield) 0F65h (Presler) Product code Smithfield: 80551 Presler:
Pentium_D
Microcode in x86 Intel processors
binary blob for CPUs up to Pentium M, with many padding bytes depending on CPUID and platform MSR. . Newer P6-derived microarchitectures up to Core2Duo use
Intel_microcode
KX-6000 "LuJiaZui", AVX2 instructions are present but not exposed through CPUID due to the lack of FMA3 support. Early drafts of the AVX10 specification
List_of_x86_SIMD_instructions
CPU microarchitecture by Intel
Processing Cores (interface) Process Die Size million transistors CPUID Model Stepping Mobile Desktop, UP Server DP Server MP Server Eight-Core (Quad-Channel)
Nehalem_(microarchitecture)
Intel microprocessors
General information Launched September 10, 2013 Designed by Intel Corporation CPUID code 0306Exh Product code 80633, 80636, 80634, 80635 Performance Max. CPU
Intel Ivy Bridge–based Xeon microprocessors
Intel_Ivy_Bridge–based_Xeon_microprocessors
1× 5 V Socket 4 A80500-50 Q0399 (B1) These are engineering samples only. CPUID = 0513h Pentium 60 60 MHz 8 + 8 KB 60 MT/s 1× 5 V 14.6 W Socket 4 March
List of Intel Pentium processors
List_of_Intel_Pentium_processors
Microprocessor microarchitecture by AMD
0Fh Processors (codename K8). 10h and 0Fh refer to the main result of the CPUID x86 processor instruction. In hexadecimal numbering, 0Fh (h represents hexadecimal
AMD_10h
Discontinued Intel x86 microprocessor
ago (2008) Marketed by Intel Designed by Intel Common manufacturer Intel CPUID code 06dx Product code 80536 Performance Max. CPU clock rate 600 MHz to
Stealey
Swedish-American computer programmer
on CPU architecture and code morphing software; and rPath. UNIX98 ptys CPUID driver The Linux kernel automounter zisofs RAID 6 support x32 ABI klibc
H._Peter_Anvin
Extension to the x86 instruction set
multiplier (PMM) REP MONTMUL The padlock capability is indicated via a CPUID instruction with EAX = 0xC0000000. If the resultant EAX >= 0xC0000001, the
VIA_PadLock
Factor influencing processor clock speed
4 era, many motherboards can determine CPU frequency automatically via CPUID. The phrase clock doubling implies a clock multiplier of two. Examples of
CPU_multiplier
CPUID
CPUID
CPUID
CPUID
Girl/Female
Tamil
Shining, Beautiful, Desirous
Girl/Female
Latin
Wonderful; extraordinary.
Girl/Female
Celtic
Agreeable.
Boy/Male
Hindu
Name of a God
Boy/Male
Hindu, Indian, Tamil
Cool; Alternative of Vimal
Boy/Male
Gujarati, Hindu, Indian, Kannada, Malayalam, Marathi, Rajasthani, Telugu
Victorious
Surname or Lastname
English
English : patronymic from Butt 3.
Girl/Female
Arabic, Hindu, Indian, Marathi, Muslim, Sanskrit, Tamil
With Excellent Plans
Boy/Male
Hindu
Lord Pandi
Girl/Female
Muslim/Islamic
Abstinent
CPUID
CPUID
CPUID
CPUID
CPUID