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American music software company
Opcode Systems, Inc. was an American music software company founded in 1985 by Dave Oppenheim and based in and around Palo Alto, California, USA. Opcode
Opcode_Systems
Part of a machine instruction
In computing, an opcode (abbreviated from operation code) is an enumerated value that specifies the operation to be performed. Opcodes are employed in
Opcode
Instructions directly executable by a computer
possible through opcode-level programming to deliberately arrange the resulting code so that two code paths share a common fragment of opcode sequences. These
Machine_code
Visual programming language
Max Software and Ben Austin moved to Opcode Systems, which became the publisher of record for Max. Although Opcode launched its commercial version named
Max_(software)
Undocumented CPU instruction that has an effect
In computer science, an illegal opcode, also called an unimplemented operation, unintended opcode or undocumented instruction, is an instruction to a
Illegal_opcode
Low-level programming language family
language uses mnemonic symbols to represent low-level machine instructions (opcodes), directives, and usually architectural registers and flags. Some of the
Assembly_language
American DJ and record producer (born 1978)
at the University of California, Santa Cruz, producing tracks using Opcode Systems Studio Vision Pro. Ashton began DJing parties in the Bay Area and drew
Bassnectar
Connection standard for electronic musical instruments
editor/librarians that combine the two functions were once common, and included Opcode Systems' Galaxy, eMagic's SoundDiver, and MOTU's Unisyn. Although these older
MIDI
System to identify resources on a network
follows: QR: 1 bit Indicates if the message is a query (0) or a reply (1). OPCODE: 4 bits The type can be QUERY (standard query, 0), IQUERY (inverse query
Domain_Name_System
Model that describes the programmable interface of a computer processor
instructions. On the processing architecture, a given instruction may specify: opcode (the instruction to be performed) e.g. add, copy, test any explicit operands:
Instruction_set_architecture
Aspect of computing history
contain a 10-bit literal, an operand call, a descriptor call or a 10-bit opcode. The B5000 was contemporaneous with the Ferranti Atlas "Computers | Timeline
History_of_operating_systems
Range of mainframe computers in the 1960s and 70s
address in a 32-bit addressing space. Further, only the VALC opcode loaded data: opcodes for ADD, MULT and so forth did no addressing, working entirely
Burroughs_Large_Systems
Combinational digital circuit
called operands, and a code indicating the operation to be performed (opcode); the ALU's output is the result of the performed operation. In many designs
Arithmetic_logic_unit
List of x86 microprocessor instructions
(6 bits for opcode C1 if it is encoded with a 64-bit operand-size under x86-64) On 80186 and later, sub-opcode /6 for the shift-opcodes C0/C1/D0/D1/D2/D3
List_of_x86_instructions
Interpreted programming language
the semantics of a few of the opcodes, and SCHIP continued to use those new semantics in addition to changing other opcodes. Many online resources about
CHIP-8
Computer assembly language instruction
SIGTRAP. The opcode for INT3 is 0xCC, as opposed to the opcode for INT immediate8, which is 0xCD immediate8. Since the dedicated 0xCC opcode has some desired
INT_(x86_instruction)
commercial version of Max (without the FTS server) was licensed by IRCAM to Opcode Systems (and, later, Cycling '74). Max/FTS eventually migrated to a software-only
ISPW
American software development company
archive of the website). C74 began producing the MSP extension to Opcode Systems's 1990 program "Max" in the mid 1990s, and in 1998 started distributing
Cycling_'74
Protocol
assigned by the program that generates any kind of query. QR - Query/Response. OPCODE - A 4-bit field that specifies the kind of query in this message. This value
Link-Local Multicast Name Resolution
Link-Local_Multicast_Name_Resolution
Computer security testing tool
against a remote target machine. Other important sub-projects include the Opcode Database, shellcode archive and related research. The Metasploit Project
Metasploit
Electronic test instrument that measures multiple signals from a circuit
digital system or digital circuit. A logic analyzer may convert the capture into timing diagrams, protocol decodes, state machine traces, opcodes, or may
Logic_analyzer
Processor executing one instruction in minimal clock cycles
to encode the two remaining registers and the opcode. Common instructions found in multi-word systems, like INC and DEC, which reduce the number of words
Reduced instruction set computer
Reduced_instruction_set_computer
Family of backward-compatible assembly languages
human-readable compared to raw machine code. Each machine code instruction is an opcode which, in assembly, is replaced with a mnemonic. Each mnemonic corresponds
X86_assembly_language
Video editing tool
on MIDI control of video in real-time. It was created with MAX from Opcode Systems, and utilized the newly released QuickTime 1.0 movie object. The first
Vujak
8-bit microprocessor
registers. The binary opcodes (machine language) were identical, but preceded by a new opcode prefix. Zilog published the opcodes and related mnemonics
Zilog_Z80
64-bit RISC instruction set architecture
Several third-party vendors also produced Alpha systems, including PC form factor motherboards. Operating systems that support Alpha included OpenVMS (formerly
DEC_Alpha
Programmable machine that processes data
code or opcode for short). The command to add two numbers together would have one opcode; the command to multiply them would have a different opcode, and
Computer
8-bit microprocessor from 1975
instruction operation codes (opcodes) are 8 bits long and have the general form AAABBBCC, where AAA and CC define the opcode, and BBB defines the addressing
MOS_Technology_6502
Musical artist
Receptor (2004–2015), Kurzweil for K2000, K2500 & K2600 (1990–2008), and Opcode Systems for Studio 5 & Galaxy Editors software (1990–1999). In 1996 he released
David_Rosenthal_(musician)
Computer machine code instruction
design flaw was discovered by programmers. Due to incomplete opcode decoding, two illegal opcodes, 0x9D and 0xDD, will cause the program counter on the processor
Halt and Catch Fire (computing)
Halt_and_Catch_Fire_(computing)
Computer file system architecture design
file system is a file system used on MS-DOS and Windows 9x family of operating systems. It continues to be used on mobile devices and embedded systems, and
Design_of_the_FAT_file_system
has a single opcode. In others, some instructions have an opcode and one or more modifiers. E.g., on the IBM System/370, byte 0 is the opcode but when byte
Comparison of instruction set architectures
Comparison_of_instruction_set_architectures
Macintosh multimedia software
Open Music System (OMS) was a virtual studio management application by Opcode for the Classic Mac OS. Similar to FreeMIDI by Mark of the Unicorn and Audio
Open_Music_System
36-bit computer by Digital (1966–1983)
general instructions, the leftmost 9 bits, 0 to 8, contain an instruction opcode. Many of the possible 512 codes are not defined in the base model machines
PDP-10
Mainframe computer, 1960s
the IBM 709: A three-bit opcode (prefix), 15-bit decrement (D), three-bit tag (T), and 15-bit address (Y) A twelve-bit opcode, two-bit flag (F), four unused
IBM_7090
Set of x86 processor instructions
The Intel BCD opcodes are a set of six x86 instructions that operate with binary-coded decimal numbers: AAA, DAA, AAS, DAS, AAM, and AAD. Most arithmetic
Intel_BCD_opcodes
Process of starting a computer
and LOADER support the 7.07 sectors had to resort to self-modifying code, opcode-level programming in machine language, controlled utilization of (documented)
Booting
Instruction for x86 microprocessors
In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from "CPU Identification")
CPUID
Instruction set architecture
(immediate), and J (jump). Every instruction starts with a 6-bit opcode. In addition to the opcode, R-type instructions specify three registers, a shift amount
MIPS_architecture
Toolkit for building GUI and command-line based operating systems
ahead-of-time compiler named IL2CPU, designed to parse CIL and output x86 opcodes. (IL To CPU) is an AOT compiler that is written using a Common Intermediate
Cosmos_(operating_system)
Topics referred to by the same term
Prague David Oppenheim (actor) (2012–now) Dave Oppenheim, founder of Opcode Systems This disambiguation page lists articles about people with the same name
David_Oppenheim
Music notation software
It was originally published by Opcode Systems, which produced MIDI sequencing and digital audio software. After Opcode ceased product development in 1999
Overture_(software)
Piece of software or hardware that creates and runs virtual machines
presents the guest operating systems with a virtual operating platform and manages the execution of the guest operating systems. Unlike an emulator, the guest
Hypervisor
Computer instruction which pauses execution
NT, for example, this instruction is run in the "System Idle Process". On x86 processors, the opcode of HLT is 0xF4. On ARM processors, the similar instructions
HLT_(x86_instruction)
Anomaly in computer security and programming
example, maintains a database of suitable opcodes, though it lists only those found in the Windows operating system. A buffer overflow occurring in the heap
Buffer_overflow
Operating system of the Atari ST range of computers
boot sectors for the Atari platform typically start with an MC68K jump opcode (e.g. 0x603C, and the last two byte word must sum with the rest of the boot
Atari_TOS
Series of 16-bit computers by Texas Instruments
of program SVC DATA >0000 R3 - Open I/O opcode DATA >0B00 R4 - Write I/O opcode DATA >0100 R5 - Close I/O opcode DATA STRING R6 - Message address DATA STRLEN
TI-990
Machine instruction that indicates to a computer to do nothing
effects; for example, on the Motorola 68000 series of processors, the NOP opcode causes a synchronization of the pipeline. Listed below are the NOP instruction
NOP_(code)
Single chip microcontroller series by Intel
initial opcode byte, followed by up to 2 bytes of operands. 1⁄4 of the opcode bytes, x0–x3, are used for irregular opcodes. 3⁄4 of the opcode bytes, x4–xF
Intel_MCS-51
instructions in the instruction set of the Common Intermediate Language bytecode. Opcode abbreviated from operation code is the portion of a machine language instruction
List_of_CIL_instructions
Software responsible for starting the computer
and LOADER support the 7.07 sectors had to resort to self-modifying code, opcode-level programming, controlled utilization of side effects, multi-level data/code
Bootloader
Experimental operating system from Microsoft Research
Intermediate Language (CIL) opcodes are compiled into x86 opcodes using the Bartok compiler. Singularity is a microkernel operating system. Unlike most historic
Singularity (operating system)
Singularity_(operating_system)
Basic instruction cycle in a computer
operations based on specific opcodes in the instruction. For example, in RISC-V architecture, funct3 and funct7 opcodes exist to distinguish whether an
Instruction_cycle
64-bit x86 register
In x86-64 mode, RDTSC also clears the upper 32 bits of RAX and RDX. Its opcode is 0F 31. Pentium competitors such as the Cyrix 6x86 did not always have
Time_Stamp_Counter
IBM mainframe operating system designed for use with smaller machines
issues command to a magnetic tape unit. The format is // MTC <opcode>,SYSxxx[,<nn>]. <opcode> is a function such as "FSF" to forward space one file or "REW"
DOS/360_and_successors
of JMP (opcodes E9 and FF /4), CALL (opcodes E8 and FF /2), RET (opcodes C2 and C3), and the short/near forms of the Jcc instructions (opcodes 70..7F and
List of discontinued x86 instructions
List_of_discontinued_x86_instructions
Source code that alters its instructions to the hardware while executing
switch { replace the opcode "increase" above with the opcode to decrease, or vice versa } } Note that two-state replacement of the opcode can be easily written
Self-modifying_code
8-bit microcontroller family
byte. Most STM8 opcode bytes consist of 1 bit of type (one- or two-operand), three bits of addressing mode, and four bits of opcode. Only 6 addressing
STM8
List of computer processor instructions
the memory operand, and 9-bit branch destinations. Later revisions added opcode bits, allowing additional address bits. They are accumulator machines, with
PIC_instruction_listings
8-bit microprocessor
slice designed by Four-Phase Systems and unveiled in February 1970. The chip was first used as part of Four-Phase's System IV/70 24-bit minicomputer to
Four-Phase_Systems_AL1
Firmware for hardware initialization and OS runtime services
data structures, memory and port addresses, and processor opcodes for the x86 architecture System Management BIOS (SMBIOS) UEFI (Unified Extensible Firmware
BIOS
Unexpected program exit due to an error
bug, executing invalid machine instructions (an illegal or unauthorized opcode), or triggering an unhandled exception. The original software bug that started
Crash_(computing)
1960s decimal computer
201–332. The 1401's instruction format is Opcode with [A-or-I-or-unit-address [B-address]] [modifier] word mark Opcodes are one character. Memory addresses
IBM_1401
System routines for Classic Mac OS
implementation of the Macintosh operating system executes system calls using that processor's illegal opcode exception handling mechanism. Motorola specified
Macintosh_Toolbox
Executable file format
compiler can generate optimized code with a simple indirect call opcode. Modern operating systems use address space layout randomization (ASLR), a process that
Portable_Executable
Model independent architecture for the S/360 line of mainframe computers
Instructions in the S/360 are two, four or six bytes in length, with the opcode in byte 0. Instructions have one of the following formats: RR (two bytes)
IBM_System/360_architecture
Fatal system error screen
03: Shutdown Error 04: Overflow Trap 05: Bounds Check Fault 06: Invalid Opcode Fault 07: "Coprocessor Not Available" Fault 08: Double Fault 09: Coprocessor
Blue_screen_of_death
Network administration command-line tool
example.com any ;; global options: +cmd ;; Got answer: ;; ->>HEADER<<- opcode: QUERY, status: NOERROR, id: 4016 ;; flags: qr rd ra; QUERY: 1, ANSWER:
Dig_(command)
1976 microprocessor
Most of these were a one-address format, in which case the instruction opcode was normally split in two, with five bits specifying the operation and the
Electronic_Arrays_9002
Instruction encoding rule for the x86 instruction set
set. Opcodes in x86 are generally one-byte, though two-byte instructions and prefixes exist. ModR/M is a byte that, if required, follows the opcode and
ModR/M
Fault initiated by x86 processors due to an access violation
13 (0Dh)). Some operating systems may also classify some exceptions not related to access violations, such as illegal opcode exceptions, as general protection
General_protection_fault
IBM midrange computer (1975–1984)
occupying 16 bits of control storage. There were 19 different microinstruction opcodes, however certain microinstructions could carry out different operations
IBM_System/32
CPU register that is always zero
benefit on performance. Some architectures accomplish this with dedicated opcodes, specialized variations of their basic instructions. Implementing these
Zero_register
Trademark for network-based product
the interpretation of the opcode byte, with "0" meaning that the opcode is a light level (ARC), and "1" meaning that the opcode is a command. Multi packet
Digital Addressable Lighting Interface
Digital_Addressable_Lighting_Interface
Mainframe computers manufactured in 1966 to 1991
were also known as Burroughs Medium Systems, by contrast with the Burroughs Large Systems and Burroughs Small Systems. The B2500 and B3500 computers were
Burroughs_Medium_Systems
performed by these opcodes is the same for Intel and AMD. This documentation difference applies only to the MMX/SSE forms of these opcodes — for VEX/EVEX-encoded
List_of_x86_SIMD_instructions
Data transfer protocol designed for mobile devices
MacDroid SyncMate Expert Commander One Newer versions of several operating systems, including AmigaOS, Android, AROS, MorphOS, Symbian OS, and HarmonyOS/OpenHarmony/Oniro
Media_Transfer_Protocol
Family of RISC-based computer architectures
state. In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing
ARM_architecture_family
Discontinued Intel microprocessor architecture
is terminated by the 0 to 5 bit opcode, if any (some classes contain only one instruction and therefore have no opcode). "The Format field permits the
Intel_iAPX_432
Comprehensive list of features of x86-based computers
structures, CMOS settings, memory and port addresses, as well as processor opcodes for x86 machines from the 1981 IBM PC up to 2000 (including many clones)
Ralf_Brown's_Interrupt_List
Assembly language and bytecode for web browsers
concatenation of the SIMD prefix, plus an opcode that is valid after the SIMD prefix, forms each SIMD opcode. The SIMD opcodes bring an additional 236 instructions
WebAssembly
Mainframe computer by Control Data
and modifier (m) usually specify the opcode, although in some cases, the register number is part of a 9-bit opcode. Most 15-bit instructions perform an
CDC_6600
CPU optimization unit
Fetching the instruction opcodes from program memory well in advance is known as prefetching and it is served by using a prefetch input queue (PIQ). The
Prefetch_input_queue
Digital circuit
particular branch needs to be updated, it rewrites the opcode with the semantically equivalent opcode that hinted the proper history. This scheme obtains
Branch_predictor
32-bit RISC-like computing architecture
immediate operands. The basic instruction "parcel" is 16 bits: 8 bits of opcode, 4 bits of source register, and 4 bits of destination register. Immediate-operand
Clipper_architecture
Educational computer assembly language
16 bits wide and have 4-bit opcodes. The instruction set defines instructions for fifteen of the sixteen possible opcodes, though some instructions have
Little_Computer_3
Computer security exploit technique
"certain machine instructions which happen to contain the return opcode in their opcodes or immediate operands", such as movl $0xC3, %eax. The ARMv8.3-A
Return-oriented_programming
segment to which the entry refers. Instructions that access memory have an opcode, a field specifying a data register operand, a field specifying a data register
Plessey_System_250
Aspect of the instruction set architecture of CPUs
particular operand. Keeping the addressing mode specifier bits separate from the opcode operation bits produces an orthogonal instruction set. Even on a computer
Addressing_mode
Type of computer instructions
sign-extension and points out the potential is much greater. Intel BCD opcodes Power ISA has a large range of bit manipulation instructions, largely due
Bit_manipulation_instructions
Computer processor designed by David M. Harland
produced similar microcode systems for Smalltalk and Prolog, the later reducing Prolog's complex unification operation to a single opcode. The Rekursiv processor
Rekursiv
Design flaw in 1993-1997 Intel processors
compare and exchange of 8 bytes in register EAX). The bug also applies to opcodes ending in C9 through CF, which specify register operands other than EAX
Pentium_F00F_bug
8-bit microprocessor
the regular encoding of the MOV instruction (using a quarter of available opcode space), there are redundant codes to copy a register into itself (MOV B
Intel_8080
Central computer component that executes instructions
combination of bits, known as the machine language opcode. While processing an instruction, the CPU decodes the opcode (via a binary decoder) into control signals
Central_processing_unit
Type of computer
code (sometimes called p-code), instructions will frequently have only an opcode commanding an operation, with no additional fields identifying a constant
Stack_machine
Compact format of microprocessor instructions
8-bit opcodes which could be followed by zero to five additional bytes depending on the addressing mode. It was during the move to 32-bit systems, and
Compressed_instruction_set
Family of instruction set architectures
produces the efficient add to AL opcode of 04h, whilst using the BL register produces the generic and longer add to register opcode of 80C3h. Another example
X86
8/16-bit microprocessor
compatibility with the NMOS 6502 and CMOS 65C02, excepting undocumented opcodes. All 256 opcodes in the 65C816 are functional in both operating modes. 24-bit memory
WDC_65C816
RISC instruction set architecture
used in Sun's Sun-4 computer workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 series. SPARC V8 added a
SPARC
Computer specialized in running Lisp
Dielectric LISP, or Finite Memories Considered Harmful, or LAMBDA: The Ultimate Opcode", Guy Lewis Steele, Gerald Jay Sussman, AI Lab memo, AIM-514, 1979 David
Lisp_machine
OPCODE SYSTEMS
OPCODE SYSTEMS
Girl/Female
Tamil
Code
Surname or Lastname
English
English : variant spelling of Coad.
Surname or Lastname
English
English : nickname for a person who insisted on a strict code of social behavior.German : topographic name for someone who lived on or by a hill, from Middle High German stickel ‘hill’, ‘slope’ + the suffix -er denoting an inhabitant; in the south an occupational name for someone who shapes and sets stakes in vineyards.
Girl/Female
Hindu
Code
Surname or Lastname
English
English : occupational name for a watchman or guard, from Old English weard ‘guard’ (used as both an agent noun and an abstract noun).Irish : reduced form of McWard, an Anglicized form of Gaelic Mac an Bhaird ‘son of the poet’. The surname occurs throughout Ireland, where three different branches of the family are known as professional poets.Surname adopted by bearers of the Jewish surname Warshawski, Warshawsky or some other Jewish name bearing some similarity to the English name.Americanized form of French Guerin.The surname Ward was brought to North America from England independently by several different bearers in the 17th and 18th centuries. Nathaniel Ward (1578–1652), author of the MA legal code, was born in Haverhill, Suffolk, England, and emigrated to Agawam (Ipswich, MA) in 1633. William Ward was one of the original settlers of Sudbury, MA, in about 1638. Miles Ward came from England to Salem, MA, in about 1639. Thomas Ward (d. 1689) settled in Newport, RI, in 1671; among his descendants were two governors of colonial RI.
Boy/Male
British, English
From the Upper Forest
Surname or Lastname
English
English : nickname from Middle English pode ‘toad’.
Boy/Male
Bengali, Celebrity, Gujarati, Hindu, Indian, Kannada, Kashmiri, Malayalam, Marathi, Punjabi, Sanskrit, Sikh, Sindhi, Tamil, Telugu
Indestructible; Legend; Immortal; Happy; Oppose Destruction; Long Life; Unconquerable
Female
Japanese
(1-儀, 2-典, 3-則, 4-法) Japanese unisex name NORI means 1) "ceremony, regalia," 2) "code, precedent," 3) "model, rule, standard," 4) "law, rule."
OPCODE SYSTEMS
OPCODE SYSTEMS
Boy/Male
Muslim
Kind friend
Boy/Male
Hindu, Indian, Punjabi, Sanskrit, Sikh, Tamil
A Great Person
Female
Russian
 Variant spelling of Russian Anya, ANIA means "favor; grace." Compare with another form of Ania.
Boy/Male
Muslim
Strength
Girl/Female
Hebrew
Gift from God.
Surname or Lastname
English
English : habitational name from Bladon in Oxfordshire or Blaydon in Tyne and Wear (formerly in County Durham). The first takes its name from a pre-English name (of uncertain origin and meaning) of the Evenlode river; the second is named with Old Norse blár ‘cold’ + Old English dūn ‘hill’.
Boy/Male
Tamil
Siddartha | ஸீதà¯à®¤à®¾à®°à¯à®¤à®¾
Lord Buddha
Girl/Female
Indian, Sanskrit
The Dispassionate
Girl/Female
British, English
Father's Joy
Boy/Male
Tamil
Gunasekaran | கà¯à®¨à®¾à®¸à¯‡à®•à®°à®£
Virtuous, Gunam
OPCODE SYSTEMS
OPCODE SYSTEMS
OPCODE SYSTEMS
OPCODE SYSTEMS
OPCODE SYSTEMS
n.
Any system of rules or regulations relating to one subject; as, the medical code, a system of rules for the regulation of the professional conduct of physicians; the naval code, a system of rules for making communications at sea means of signals.
n.
To place in front of, or over against; to set opposite; to exhibit.
v. t.
To oppose again.
imp. & p. p.
of Oppose
p. pr. & vb. n.
of Oppose
v. t.
To oppose.
v. i.
To make objection or opposition in controversy.
v. t.
To set against; to oppose.
n.
To compete with; to strive against; as, to oppose a rival for a prize.
v. i.
To oppose.
pl.
of Apode
n.
The after song; the part of a lyric ode which follows the strophe and antistrophe, -- the ancient ode being divided into strophe, antistrophe, and epode.
v. i.
To act adversely or in opposition; -- with against or to; as, a servant opposed against the act.
n.
To resist or antagonize by physical means, or by arguments, etc.; to contend against; to confront; to resist; to withstand; as, to oppose the king in battle; to oppose a bill in Congress.
v. t.
To oppose; to resist.
pl.
of Apode
v. t.
To cross; to oppose.
v. t.
To oppose; to fight against.
v. i.
To be set opposite.
n.
To put in opposition, with a view to counterbalance or countervail; to set against; to offer antagonistically.