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Instruction set architecture
developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. There are multiple versions of MIPS, including MIPS I, II, III,
MIPS_architecture
Topics referred to by the same term
Look up MIPS in Wiktionary, the free dictionary. MIPS may refer to: MIPS Technologies, an American semiconductor design firm Maharana Institute of Professional
MIPS
American fabless semiconductor design company
37.4201°N 122.0728°W / 37.4201; -122.0728 MIPS Tech LLC, formerly MIPS Computer Systems, Inc. and MIPS Technologies, Inc., is an American fabless semiconductor
MIPS_Technologies
Line of computer workstations
The MIPS Magnum was a line of computer workstations designed by MIPS Computer Systems, Inc. and based on the MIPS series of RISC microprocessors. The
MIPS_Magnum
Topics referred to by the same term
provide mobility in the Internet MIPS (disambiguation) This disambiguation page lists articles associated with the title MIP. If an internal link incorrectly
MIP
developed as a follow-on project to the MIPS project at Stanford University by the same team that developed MIPS. The project was supported by the Defense
MIPS-X
Unscientific measurement of CPU speed made by the Linux kernel
BogoMips (from "bogus" and MIPS) is a crude measurement of CPU speed made by the Linux kernel when it boots to calibrate an internal busy-loop. An often-quoted
BogoMips
Processor executing one instruction in minimal clock cycles
concepts in two seminal projects, Stanford MIPS and Berkeley RISC. These were commercialized in the 1980s as the MIPS and SPARC systems. IBM eventually produced
Reduced instruction set computer
Reduced_instruction_set_computer
are designed by Imagination Technologies, MIPS Technologies, and others. It displays an overview of the MIPS processors with performance and functionality
List of MIPS architecture processors
List_of_MIPS_architecture_processors
Processors using some version of the MIPS architecture
processors implementing some version of the MIPS architecture have been designed and used widely. The first MIPS microprocessor, the R2000, was announced
MIPS_architecture_processors
rates: 16 MHz, 5 MIPS 20 MHz, 6 to 7 MIPS, introduced February 16, 1987 25 MHz, 7.5 MIPS, introduced April 4, 1988 33 MHz, 9.9 MIPS (9.4 SPECint92 on
List_of_Intel_processors
Measure of a computer's processing speed
the idea of using VAX as a MIPS reference. Its results were reported in "DMIPS", for Dhrystone MIPS. Each Dhrystone MIPS was defined as the ability to
Instructions_per_second
1981–2009 American computing company
future generations of MIPS microprocessors (the 64-bit R4000), SGI acquired the company in 1992 for $333 million and renamed it as MIPS Technologies Inc.
Silicon_Graphics
Research project into RISC-based microprocessor design
MIPS (also known as Stanford MIPS to disambiguate it from later architectures), an acronym for Microprocessor without Interlocked Pipeline Stages, was
Stanford_MIPS
Memory-saving rendering technique in which resolution of farther-away images is lowered
In computer graphics, a mipmap (mip being an acronym of the Latin phrase multum in parvo, meaning "much in little") is a pre-calculated, optimized sequence
Mipmap
RISC microprocessor
developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in June 1988, it was the second MIPS implementation
R3000
Safety technology
need to know about MIPS". Road.cc. Retrieved 2020-04-21. "Innovation — MIPS History". mipsprotection.com. Retrieved 2020-03-02. "MIPS". sweetprotection
Multi-directional Impact Protection System
Multi-directional_Impact_Protection_System
Chinese microprocessor manufacturer
STMicroelectronics bought a MIPS license for Loongson, and thus the processor can be promoted as MIPS-based or MIPS-compatible instead of MIPS-like. In June 2009
Loongson
Protein family
Inflammatory Proteins (MIP) belong to the family of chemotactic cytokines known as chemokines. In humans, there are two major forms, MIP-1α and MIP-1β, renamed CCL3
Macrophage inflammatory protein
Macrophage_inflammatory_protein
64-bit microprocessor developed in 1996
implements the MIPS IV instruction set architecture (ISA) developed by Quantum Effect Design (QED) in 1996. The project was funded by MIPS Technologies
R5000
Microprocessor designed by MIPS Technologies, Inc.
by MIPS Technologies that implemented the MIPS III instruction set architecture, and was initially referred to as the VRX during development. MIPS, which
R4200
Public university in Germany
October 2025. "IKUS – IKUS". www.ikus.ovgu.de. "MIPS – Magdeburg International PhD Students (MIPS)". www.mips.ovgu.de. "Studentenwerk". studentenwerk-magdeburg
Otto von Guericke University Magdeburg
Otto_von_Guericke_University_Magdeburg
Search problem
efficient algorithms exist to speed up MIPS search. Under the assumption of all vectors in the set having constant norm, MIPS can be viewed as equivalent to a
Maximum_inner-product_search
NATO-centred military coordination organization
The Multilateral Interoperability Programme (MIP) is an effort to deliver an assured capability for information interoperability to support multinational
Multilateral Interoperability Programme
Multilateral_Interoperability_Programme
Operating system
MIPS Computer Systems, Inc. from 1985 to 1992, for their computer workstations and servers, including such models as the MIPS M/120 server and MIPS Magnum
MIPS_RISC/os
Computing standard based on MIPS architecture
boot console to boot NT. These include the following: MIPS R4000-based systems such as the MIPS Magnum workstation all Alpha-based machines with a PCI
ARC_(specification)
Computer operating system
support for the 64-bit MIPS R8000 processor, but is otherwise similar to IRIX 5.2. Later 6.x releases support other members of the MIPS processor family in
IRIX
Contagious disease caused by SARS-CoV-2
chemoattractant protein 1 (MCP1) Macrophage inflammatory protein 1‑alpha (MIP‑1‑alpha) Tumour necrosis factor (TNF‑α) indicative of cytokine release syndrome
COVID-19
MIPS microprocessor
The R4000 is a microprocessor developed by MIPS Computer Systems that implements the MIPS III instruction set architecture (ISA). Officially announced
R4000
Microprocessor chipset
microprocessor chipset developed by MIPS Technologies, Inc. (MTI), Toshiba, and Weitek. It was the first implementation of the MIPS IV instruction set architecture
R8000
Operating system for mobile devices
system to 64-bit RISC-V architecture was released in 2021. 32- and 64-bit MIPS was once supported. Requirements for the minimum amount of RAM for smartphones
Android_(operating_system)
ARM, XScale, Blackfin, ColdFire, MIPS, PowerPC, x86 INtime Proprietary x86 ITRON T-License varies embedded ARM, MIPS, x86, Renesas RX100-200-600-700-others
Comparison of real-time operating systems
Comparison_of_real-time_operating_systems
Computer architecture bit width
exceptions are older or embedded ARM architecture (ARM) and 32-bit MIPS architecture (MIPS) CPUs) have integrated floating point hardware, which is often
64-bit_computing
Family of mainframe computers
The 3600 CPU can execute around one million instructions per second (1 MIPS), giving it supercomputer status in 1965. Much of the basic architecture
CDC_3000_series
MIPS microprocessor
a RISC microprocessor implementation of the MIPS IV instruction set architecture (ISA) developed by MIPS Technologies, Inc. (MTI), then a division of
R10000
RISC processor architecture
modernized) simplified Stanford MIPS CPU. The DLX has a simple 32-bit load/store architecture, somewhat unlike the modern MIPS architecture CPU. As the DLX
DLX
Computer architecture
most MIPS-based Windows NT systems.[citation needed] Microsoft intended NT to be portable between various microprocessor architectures so the MIPS RISC
Jazz_(computer)
The MIP Smyk, MIP from the initials of its Polish designers with Smyk meaning Brat or Kid, was an aerodynamically refined motor glider designed and built
MIP_Smyk
British semiconductor and software design company
it would sell its MIPS and Ensigma businesses. Imagination Technologies sold MIPS processor rights to Tallwood MIPS Inc in 2017. MIPS Technologies was
Imagination_Technologies
Multi-platform emulator for mainframe software
about 50 to 60 MIPS for code that utilizes both processors in a realistic environment, with sustained rates rising to a reported 300 MIPS on leading-edge
Hercules_(emulator)
Efficiency improving technique for superscalar CPUs
latest[when?] Imagination Technologies MIPS architecture designs include an SMT system known as "MIPS MT". MIPS MT provides for both heavyweight virtual
Simultaneous_multithreading
Assembly-language programming and binary-analysis tools
"edb-debugger". GitHub. Retrieved May 10, 2026. "SPIM MIPS Simulator". SourceForge. Retrieved May 10, 2026. "MARS MIPS Assembler and Runtime Simulator". Missouri
List of assembly software and tools
List_of_assembly_software_and_tools
Extension to the MIPS architecture
The MDMX (MIPS Digital Media eXtension), also known as MaDMaX, is an extension to the MIPS architecture released in October 1996 at the Microprocessor
MDMX
Personal computer
ARM3 could achieve 10.5 VAX MIPS, with the ARM3-based A5000 achieving a reported 13.8 VAX MIPS, rising to 15.1 VAX MIPS in its 33 MHz variant. ARM3 upgrades
Acorn_Archimedes
Microprocessor design released in 1995
up to 2.7 MIPS (million instructions per second), for the base 68328 and DragonBall EZ (MC68EZ328) model. It was extended to 33 MHz, 5.4 MIPS for the DragonBall
DragonBall_(microcontroller)
File format
was developed for the MIPS platform, and was used by DEC Ultrix and Tru64 (previously Digital Unix and OSF/1), SGI Irix, Linux/MIPS and the Net Yaroze.
ECOFF
Hennessy (creator of MIPS) for teaching purposes MIPS architecture, MIPS-32 architecture MIPS-X, developed as a follow-on project to the MIPS architecture Reduced
Single-cycle_processor
American fabless semiconductor company
semiconductor company based in San Jose, California, specializing in ARM-based and MIPS-based network, video and security processors and SoCs. The company was co-founded
Cavium
Graduate school of business in Italy
POLIMI Graduate School of Management (formerly MIP Politecnico di Milano Graduate School of Business) is a private business school created in 1979 and
POLIMI Graduate School of Management
POLIMI_Graduate_School_of_Management
Line of mainframe computers
explained by IBM, the MIPS ratings are varying estimates. Besides 468 MIPS, ratings of 465, 467, 475, 480, 484.5, and 485 MIPS exist. IBM's own publication
IBM_System/390
Aspect of CPU performance
{\text{Hz}}} since: MIPS ∝ 1 / CPI {\displaystyle {\text{MIPS}}\propto 1/{\text{CPI}}} and MIPS ∝ clock frequency {\displaystyle {\text{MIPS}}\propto {\text{clock
Cycles_per_instruction
Polymer with synthetic molecular receptor
the removal of low-affinity MIPs and overcoming many of the previously described limitations of MIPs: Separation of MIPs from the immobilised template
Molecularly_imprinted_polymer
DEC brand of computers
a range of computer workstations based on the MIPS architecture and a range of PC compatibles. The MIPS-based workstations ran ULTRIX, a DEC-proprietary
DECstation
Microprocessor developed by MIPS Computer Systems
The R6000 is a microprocessor chip set developed by MIPS Computer Systems that implemented the MIPS II instruction set architecture (ISA). The chip set
R6000
National Basketball Association award
The NBA's Most Improved Player (MIP) is an annual National Basketball Association (NBA) award given to the player who has shown the most progress during
NBA_Most_Improved_Player
workstation OVPsim also emulates MIPS, and where all the MIPS models are verified by MIPS Technologies QEMU also emulates MIPS MIPS architecture "Changes to Spim"
SPIM
Type of stock senior to common stock
Goldman Sachs in 1993. In essence, MIPS is a combination of deeply subordinated debt and preferred stock.[citation needed] MIPS is structured in such a way as
Preferred_stock
pSOS (Portable Software On Silicon) is a real-time operating system (RTOS), created in about 1982 by Alfred Chao, and developed and marketed for the first
PSOS (real-time operating system)
PSOS_(real-time_operating_system)
Chinese semiconductor company
purpose MIPS registers. It consists of sixteen 32-bit data registers and a 32-bit control register. CPUs which support MXU are used in MIPS Creator single-board
Ingenic_Semiconductor
Russian microprocessor
Baikal CPU is a line of MIPS, RISC-V and ARM-based microprocessors developed by fabless design firm Baikal Electronics, a spin-off of the Russian supercomputer
Baikal_CPU
the original on January 17, 2024. "MIPS Technologies Adopts Myriad's Dalvik Turbo VM Engine for its Android™ on MIPS® Distribution". 2011-05-09. Archived
Dalvik_Turbo_virtual_machine
Research project into RISC-based microprocessor design
this design. Where the two projects, RISC and MIPS, differed was in the handling of the registers. MIPS simply added lots of registers and left it to
Berkeley_RISC
Computer terminal and workstation family
refocused to the MIPS-based 4D/70, and only saw release with 4D1-3. Beginning in 1987, Silicon Graphics began selling workstations with MIPS RISC processors
SGI_IRIS
Economic concept
per unit of service (MIPS) is an economic concept, originally developed at the Wuppertal Institute, Germany in the 1990s. The MIPS concept can be used
Material input per unit of service
Material_input_per_unit_of_service
Operating system
(Sun-2 and Sun-3 workstations, AT&T UNIX PC, MECB), Intel x86, PowerPC G3, MIPS, ARM architecture and AVR (atmega328p/Arduino). Xinu was also used for some
Xinu
Microprocessor developed by MIPS Computer Systems
R2000 is a 32-bit microprocessor chipset developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in
R2000_microprocessor
Australian conservationist (born 2003)
January 2026. Dickson, Jeremy (11 August 2014). "Wild But True to launch at MIP Junior". Kidscreen. Brunico Communications. Archived from the original on
Robert Irwin (conservationist)
Robert_Irwin_(conservationist)
Mobility management protocol
Proxy Mobile IPv6 (or PMIPv6, or PMIP) is a network-based mobility management protocol standardized by IETF and is specified in RFC 5213. It is a protocol
Proxy_Mobile_IPv6
JavaScript and WebAssembly engine
collector is a generational incremental collector. V8 can compile to x86, ARM or MIPS instruction set architectures in both their 32-bit and 64-bit editions; it
V8_(JavaScript_engine)
Interface to software defined in terms of in-process, machine code access
can affect performance. Widely used EABIs include the PowerPC, Arm, and MIPS EABIs. Specific software implementations like the C library may impose additional
Application_binary_interface
Manufacturer of fault-tolerant computers
with MIPS and adopted its R3000 and successor chipsets and their advanced optimizing compiler. Subsequent NonStop Guardian machines using the MIPS architecture
Tandem_Computers
500 mips MIPS32 emulator, can be used to develop software using virtual platforms, emulators including MIPS processors running at up to 500 MIPS, the
List_of_emulators
English boxer, influencer, and musician (born 1993)
January 2019. Retrieved 18 November 2019. Webdale, Jonathan (4 July 2016). "Mip digital realities". C21 Media. Archived from the original on 17 May 2020
KSI
Raster graphics editor
Windows 11 Platform IA-32, x86-64, and ARM (historically Itanium, DEC Alpha, MIPS, and PowerPC) Included with All Microsoft Windows versions Type Raster graphics
Microsoft_Paint
Consortium of firms that develops open standards for mobile devices
original on May 25, 2019. Retrieved June 2, 2009. "MIPS Technologies Joins the Open Handset Alliance". MIPS Technologies, Inc. September 30, 2009. Archived
Open_Handset_Alliance
Model that describes the programmable interface of a computer processor
32-bit instructions are usually 3-operand designs, such as the ARM, AVR32, MIPS, Power ISA, and SPARC architectures. However even 3-operand RISC architectures
Instruction_set_architecture
American non-profit corporation
and high-performance computing vendors Apollo Computer, Hewlett-Packard, MIPS Computer Systems and Sun Microsystems to more accurately characterise the
Standard Performance Evaluation Corporation
Standard_Performance_Evaluation_Corporation
PDA product line by Casio
Palm-size PC edition Size: 80 mm × 120 mm × 20 mm :: 184 g CPU: NEC VR4111 MIPS at 69 MHz Memory: RAM 4 MB and ROM 8 MB Display: FSTN LCD, 240 x 320 Pixel
Casio_Cassiopeia
Family of Unix-like operating systems
supercomputers Alpha, ARC, ARM, C-Sky, Hexagon, LoongArch, m68k, Microblaze, MIPS, Nios II, OpenRISC, PA-RISC, PowerPC, Power ISA, RISC-V, ESA/390, z/Architecture
Linux
Electrical engineer and entrepreneur
"father of mass market GPS". He was named IEEE Fellow in 2012. MIPS. "Wave Computing and MIPS Emerge from Chapter 11 Bankruptcy". www.prnewswire.com. Retrieved
Sanjai_Kohli
School district in Michigan
The school district operates one school, Mackinac Island Public School (MIPS). Mackinac Island School District includes all of Mackinac Island and the
Mackinac Island School District
Mackinac_Island_School_District
Free and open-source media player software
an Android port called mpv-android. It is cross-platform, running on ARM, MIPS, PowerPC, RISC-V, s390x, x86/IA-32, x86-64, and some other by 3rd party.
Mpv_(media_player)
The CUSIP-linked MIP code (CLIP) is used in the financial derivatives markets to identify the reference entity of a credit default swap. It is mainly
CUSIP-linked_MIP_code
2014 family of single-board computers
Technologies to promote educational research and software development based on the MIPS architecture. The first board in the platform, the Creator Ci20, was released
Imagination_Creator
Type of AI with wide-ranging abilities
recently, in 1997, Moravec argued for 108 MIPS which would roughly correspond to 1014 cps. Moravec talks in terms of MIPS, not "cps", which is a non-standard
Artificial general intelligence
Artificial_general_intelligence
Metaphor identification procedure (MIP) is a method for identifying metaphorically used words in discourse. It can be used to recognize metaphors in spoken
Metaphor identification procedure
Metaphor_identification_procedure
Discontinued embedded operating system by Microsoft
devices had to have the following minimum hardware specifications: SH3, MIPS 3000 or MIPS 4000 CPU Minimum of 4 MB of ROM Minimum of 2 MB of RAM with a backup
Windows_CE
Free software collection
FR-V, H8/300, IA-32/x86-64, Hexagon, Itanium, M32R, m68k, META, MicroBlaze, MIPS, MN103, OpenRISC, PA-RISC, PowerPC, s390/s390x, S+core, SuperH, SPARC, TILE64
GNU
Line of single-chip microprocessors from Microchip Technology
(PDF). Retrieved 23 September 2007. "MIPS32® M4K® Core - MIPS Technologies -MIPS Everywhere - MIPS Technologies". Archived from the original on 2009-02-02
PIC_microcontrollers
Computer operating system
world. Windows NT 4.0 and its predecessors supported PowerPC, DEC Alpha and MIPS R4000 (although some of the platforms implement 64-bit computing, the OS
Microsoft_Windows
video game console. LSI CoreWare CW33000-based core MIPS R3000A-compatible 32-bit RISC CPU MIPS R3051 with 5 KB L1 cache, running at 33.8688 MHz. The
PlayStation technical specifications
PlayStation_technical_specifications
NVCom-02T) NIISI KOMDIV-32 – 32-bit, implements the MIPS I instruction set architecture (ISA), compatible with MIPS R3000, 90 MHz clock rate KOMDIV-64 (1890VM5)
List of Russian microprocessors
List_of_Russian_microprocessors
Successor to the Intel 386
the initial performance was originally published between 15 and 20 VAX MIPS, between 37,000 and 49,000 dhrystones per second, and between 6.1 and 8.2
I486
Workstation computers
distinct MIPS CPU variants: the 100 to 250 MHz MIPS R4000 and R4400, and the Quantum Effect Devices R4600 (IP22 mainboard); the 75 MHz MIPS R8000 (IP26
SGI_Indigo2
Computer company
tape and disk controllers, and power switches. It was able to reach 4.5 MIPS. The F1 is mostly famous for having been the computer behind some of the
Foonly
Computer data storage partitioning standard
77055800-792C-4F94-B39A-98C91B762BB6 mips: 32‐bit MIPS big‐endian E9434544-6E2C-47CC-BAE2-12D6DEAFB44C mips64: 64‐bit MIPS big‐endian D113AF76-80EF-41B4-BDB6-0CFF4D3D4A25
GUID_Partition_Table
Unix workstation from Silicon Graphics
to replace their earlier Indy series. Like the Indy, the O2 uses a single MIPS microprocessor and was intended to be used mainly for multimedia. Its larger
SGI_O2
Private school in Macau, China
Kao Yip Middle School (Chinese: 教業中學; Portuguese: Escola Kao Yip) is a preschool through secondary school in Sé (Cathedral Parish), Macau. It was founded
Kao_Yip_Middle_School
Microsoft operating system family
been released for a variety of processor architectures, initially IA-32, MIPS, and DEC Alpha, with PowerPC, Itanium, x86-64 and ARM supported in later
Windows_NT
Computer series
are two-way multiprocessing-capable workstations, originally based on the MIPS Technologies R10000 microprocessor. Newer Octanes are based on the R12000
SGI_Octane
MIPS
MIPS
MIPS
MIPS
Boy/Male
Hindu
Master of all or God or king or Lord of all
Surname or Lastname
English (Yorkshire)
English (Yorkshire) : habitational name from Hardisty Hill in the parish of Fewston, North Yorkshire, recorded in 1379 as Hardolfsty, from the Old English personal name Heardwulf (composed of the elements heard ‘hardy’, ‘brave’, ‘strong’ + wulf ‘wolf’) + Old English stīg ‘path’.
Boy/Male
English
From the east cottage.
Girl/Female
Hindu, Indian
A Young Girl Wearing Bangle
Boy/Male
Indian
God-fearing person
Girl/Female
Biblical
Rashness, confidence.
Girl/Female
Arabic, Muslim
Light; Bright; Splendour; Luminous
Boy/Male
Indian, Punjabi, Sikh
Excellent Kingdom
Girl/Female
Indian
Flower.
Boy/Male
Hindu
Nirmal
MIPS
MIPS
MIPS
MIPS
MIPS