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See searches and references containing CLOCK RATE!CLOCK RATE
Frequency at which a CPU chip or core is operating
In computing, clock rate or clock speed is the frequency at which the clock generator of a processor can generate pulses used to synchronize the operations
Clock_rate
Electronic signal to synchronize circuits
using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the
Clock_signal
Type of computer memory
edges of the clock signal, effectively doubling the data rate without increasing the clock frequency. This technique, known as double data rate (DDR), allows
DDR_SDRAM
system bus clock rate Variants 150 MHz (60 MHz bus clock rate, 256 KB 0.6 μm cache) introduced November 1, 1995 166 MHz (66 MHz bus clock rate, 512 KB 0
List_of_Intel_processors
2024 Intel product line
There has been a clock speed regression for Lion Cove P-cores in Arrow Lake-S desktop processors. The Core Ultra 9 285K has a peak clock speed of 5.7 GHz
Arrow_Lake_(microprocessor)
Third generation of double-data-rate synchronous dynamic random-access memory
(400–1066 MT/s using a 200–533 MHz I/O clock) and four times the rate of DDR (200–400 MT/s using a 100–200 MHz I/O clock). High-performance graphics was an
DDR3_SDRAM
Type of computer memory introduced 2014
efficiency. DDR4 speeds are advertised as double the base clock rate due to its Double Data Rate (DDR) nature, with common speeds including DDR4-2400 and
DDR4_SDRAM
Technique to deduce the time in prehistory when two or more life forms diverged
The molecular clock is a figurative term for a technique that uses the mutation rate of biomolecules to deduce the time in prehistory when two or more
Molecular_clock
Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation. Manufacturer suggested retail price at launch
List_of_AMD_Ryzen_processors
Brand of microprocessors by AMD
Socket AM4 TDP: 35 W First release: September 6, 2018 CPU clock rate: 3.2 to 3.5 GHz GPU clock rate: 1000 to 1100 MHz Mendocino (6 nm) (see the list article
Athlon
Base Clock – The factory core clock frequency; while some manufacturers adjust clocks lower and higher, this number will always be the reference clocks used
List of Nvidia graphics processing units
List_of_Nvidia_graphics_processing_units
ARM Cortex-M based Microcontrollers by STMicroelectronics
low-cost STM32-series of microcontrollers: ARM Cortex-M0+ core at a maximum clock rate of 48 MHz. The STM32 F0-series are the first group of ARM Cortex-M0 chips
STM32
Second generation of double-data-rate synchronous dynamic random-access memory
clock cycle. Since the DDR2 internal clock runs at half the DDR external clock rate, DDR2 memory operating at the same external data bus clock rate as
DDR2_SDRAM
Coordination of independent clocks
accurately, real clocks will differ after some amount of time due to clock drift, caused by clocks counting time at slightly different rates. There are several
Clock_synchronization
Measured time difference as explained by relativity theory
frame moving relative to the local clock, this clock will be running (that is ticking) more slowly, since tick rate equals one over the time period between
Time_dilation
Die size: 111 mm2 (Conroe) Steppings: ? These models feature an unlocked clock multiplier All models support: MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel
List_of_Intel_Core_processors
Microprocessor family released in 2016
and Pentium-branded ones support only SSE4.1/4.2. 350 MHz base graphics clock rate No L4 cache (eDRAM) A release date of January 3, 2017 Features common
Kaby_Lake
Series of GPUs by AMD
alongside the Zen line of CPUs. Vega targets increased instructions per clock, higher clock speeds, and support for HBM2. AMD's Vega has new memory hierarchy
Radeon_RX_Vega_series
Central computer component that executes instructions
of these early synchronous CPUs ran at low clock rates compared to modern microelectronic designs. Clock signal frequencies ranging from 100 kHz to 4 MHz
Central_processing_unit
Series of CPUs by AMD
only the Transmeta Crusoe. This means the controller runs at the same clock rate as the CPU, and that the electrical signals have a shorter physical distance
Athlon_64
2020 AMD 7-nanometer processor microarchitecture
cycles in Zen 2 to 46 clock cycles and halves per-core cache bandwidth, although both problems are partially mitigated by higher clock speeds. Total cache
Zen_3
GPU microarchitecture by AMD
boost) core clock speed. Pixel fillrate is calculated as the number of Render Output Units multiplied by the base (or boost) core clock speed. Precision
RDNA_4
CPU microarchitecture by Intel
Pentium-branded ones only support up to SSE4.2 350 MHz base graphics clock rate Common features of the high-performance Skylake-X CPUs: In addition to
Skylake_(microarchitecture)
Communication signaling technique
Quad data rate (QDR, or quad pumping) is a communication signaling technique wherein data are transmitted at four points in the clock cycle: on the rising
Quad_data_rate
Server and workstation processor line by AMD
First release: December 2004 Clock rate: 1.6–3.0 GHz (x42 – x56) CPU steppings: E1, E6 First release: April 2005 Clock rate: 1.6–2.8 GHz (x60, x65, x70
Opteron
Line of CPUs produced by Intel
across the board (or near to it), while operating at drastically lower clock rates. Maintaining high instructions per cycle (IPC) on a deeply pipelined
Intel_Core
architecture, 300 MHz clock rate, developed by MCST Elbrus-S Elbrus-1S+ – single-core evolution of Elbrus 2000 SoC, 1000 MHz clock rate + GPU Elbrus-2S+ –
List of Russian microprocessors
List_of_Russian_microprocessors
Intel microprocessor released in 2021
Cypress Cove CPU cores Up to 19% claimed increase in IPC (instructions-per-clock) DL Boost (low-precision arithmetic for Deep Learning) and AVX-512 instructions
Rocket_Lake
Intel processor microarchitecture
HD graphics (Pentium and Celeron models) or no graphics core (Graphics Clock rate indicated by N/A). This list may not contain all the Sandy Bridge processors
Sandy_Bridge
Intel microprocessor family
Power is only guaranteed when P-Cores/E-cores do not exceed the base clock rate. Max Turbo Power: the maximum sustained (> 1 s) power dissipation of the
Alder_Lake
2024 AMD 4-nanometer processor microarchitecture
can predict up to two branches per clock cycle. Previous architectures were limited to one branch instruction per clock cycle, limiting the instruction-fetch
Zen_5
System-on-a-chip designed by Apple Inc.
up 53.3 mm2 of area. The clock rate of the Cortex-A8 in the A4 used inside the first-generation iPad is 1 GHz. The clock rate of the Cortex-A8 in the A4
Apple_A4
of functional units. Core clock – The reference base and boost (if available) core clock frequency. Fillrate Pixel - The rate at which pixels can be rendered
List of AMD graphics processing units
List_of_AMD_graphics_processing_units
Graphics processing unit brand
multiprocessors multiplied by the number of fragments per clock that they can output multiplied by the base clock rate. Shading cores (ALU): texture mapping units (TMU):
Intel_Arc
Line of Intel server and workstation processors
lower clock rates at the same price point (since servers run more tasks in parallel than desktops, core counts are more important than clock rates), and
Xeon
Type of computer memory
LPDDR-1066 (clock frequencies of 100 to 533 MHz). Working at 1.2 V, LPDDR2 multiplexes the control and address lines onto a 10-bit double data rate CA bus
LPDDR
Series of CPUs by AMD
VCore: 1.35–1.4 V Power use (TDP): 89 Watt First release: 1 August 2005 Clock rate: 2000–2400 MHz 256 KB L2 cache: 3600+: 2000 MHz 512 KB L2 cache: 3800+:
Athlon_64_X2
Method of computer bus operation
computing, double data rate (DDR) describes a computer bus that transfers data on both the rising and falling edges of the clock signal and hence doubles
Double_data_rate
Where a clock does not run at same rate as reference clock
Clock drift refers to several related phenomena where a clock does not run at exactly the same rate as a reference clock. That is, after some time the
Clock_drift
Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation. Unified shaders : texture mapping units :
List of AMD processors with 3D graphics
List_of_AMD_processors_with_3D_graphics
Eighth-generation Intel Core microprocessor family
Coffee Lake Refresh family. To avoid running into thermal problems at high clock speeds, Intel soldered the integrated heat spreader (IHS) to the CPU die
Coffee_Lake
data rate (DDR) front-side bus, (EV-6) meaning that the actual data transfer rate of the bus is twice its physical clock rate. The FSB's true data rate, 200
List_of_AMD_Athlon_processors
Instrument for measuring, keeping or indicating time
A clock or chronometer is a device that measures and displays time. The clock is one of the oldest human inventions, meeting the need to measure intervals
Clock
2019 AMD 7-nanometer processor microarchitecture
processor Threadripper 3990X. Zen 2 delivers about 15% more instructions per clock than Zen and Zen+, the 14- and 12-nm microarchitectures utilized on first
Zen_2
multiprocessors multiplied by the number of fragments per clock that they can output multiplied by the base clock rate. Texture fillrate is calculated as the number
List of Intel graphics processing units
List_of_Intel_graphics_processing_units
Color to analog voltage table
graphics cards could clock the RAMDAC much faster in true color modes, when only the DAC part without the SRAM is used. The pixel clock rate for a given output
RAMDAC
reaction being studied. Radical clock reactions involve a competition between a unimolecular radical reaction with a known rate constant and a bimolecular
Radical_clock
2022 AMD 5-nanometer processor microarchitecture
for x86-based desktop processors and also marks the return of 5.0 GHz clock rate to any AMD processors for the first time since the AMD FX-9590. On all
Zen_4
Family of 32-bit microcontroller integrated circuits
is: Core: ARM Cortex-M4F and one or two ARM Cortex-M0 core at a maximum clock rate of 204 MHz. Debug interface is JTAG or SWD with SWO "Serial Trace", eight
NXP_LPC
Family of AMD multi-core 45 nm processors
single-threaded applications to run on a core that idles at half its clock rate. This feature can be disabled through BIOS options on most motherboards
Phenom_II
Series of CPUs by AMD
100 MHz (200 MT/s) VCore: 1.50 V – 1.60 V First release: June 19, 2000 Clock rate: 600–950 MHz L1 cache: 64 + 64 KB (Data + Instructions) L2 cache: 64 KB
Duron
Line of discontinued microprocessors made by Intel
achieved by simply increasing the front-side bus (FSB) clock rate from the stock 66 MHz to the 100 MHz clock of the Pentium II, helped by several facts: the
Celeron
Synchronization interface for electronic musical instruments
DIN sync and MIDI clock outputs can act as a master clock for those two formats. Though DIN sync and MIDI clock have the same clock rate, they require a
DIN_sync
GPU microarchitecture by AMD
lower core clock speeds used in low-power situations. Most rich vector shader instructions for interpolation and comparison are also double rate compared
RDNA_3
Family of central processing unit models
consumption (TDP): 25-65 Watts First release June 2009 (Stepping C2) Clock rate: 1.6 - 3.6 GHz Models: Athlon II X2 250u - 280 Three AMD K10 cores chip
Athlon_II
Intel processor microarchitecture
improvement on average is about 3% Around 15 °C hotter than Ivy Bridge, while clock frequencies of over 4.6 GHz are achievable 22 nm manufacturing process 3D
Haswell_(microarchitecture)
2017 AMD 14-nanometer processor microarchitecture
to 2× faster L1 and L2 bandwidth, with total L3 cache bandwidth up 5×. Clock gating. Larger retire, load, and store queues. Improved branch prediction
Zen_(first_generation)
Line of Intel microprocessors released in 2022
processors also need accompanying chipsets. Raptor Lake CPUs contain a clock tree circuit vulnerable to accelerated aging and permanent damage at elevated
Raptor_Lake
Line of desktop and mobile microprocessors produced by Intel
Intel names Advanced Transfer Cache (ATC). The ATC operates at the core clock rate and has a capacity of 256 KB, twice that of the on-chip cache formerly
Pentium_III
Microprocessor microarchitecture by AMD
driven by a clock at one quarter of the external data frequency, as opposed to one half that of DDR. However, since the command clock rate in DDR2 is doubled
AMD_10h
Type of computer memory
low. At higher clock rates, the useful CAS latency in clock cycles naturally increases. 10–15 ns is 2–3 cycles (CL2–3) of the 200 MHz clock of DDR-400 SDRAM
Synchronous dynamic random-access memory
Synchronous_dynamic_random-access_memory
Successor to the Intel 386
continued to produce i486 processors, including the triple-clock-rate 486DX4-100 with a 100 MHz clock speed and a L1 cache doubled to 16 KB. Earlier, Intel
I486
Intel processor microarchitecture
rival the Mobile Pentium 4 clocked over 1 GHz higher (the fastest-clocked Mobile Pentium 4 compared to the fastest-clocked Pentium M) and equipped with
P6_(microarchitecture)
Specification that defines an interface between a camera and a host processor
interference reasons the system designer can select between two different clock rates (a and b) in each of the M-PHY speed levels. Display Serial Interface
Camera_Serial_Interface
Timepiece in which time is measured by the flow of liquid into or out of a vessel
A water clock, or clepsydra (from Ancient Greek κλεψύδρα (klepsúdra) 'pipette, water clock'; from κλέπτω (kléptō) 'to steal' and ὕδωρ (hydor) 'water';
Water_clock
Intel GPU architecture
multiprocessors multiplied by the number of fragments per clock that they can output multiplied by the base clock rate. Shading cores (ALU): texture mapping units (TMU):
Intel_Xe
Time delay between data read command and availability of data in a computer's RAM
respond to a CAS event might vary between uses of the same module if the clock rate differs. Dynamic RAM is arranged in a rectangular array. Each row is selected
CAS_latency
without 3D V-Cache will be able to reach the maximum boost clocks. The CCX with 3D V-Cache will clock lower. Key features of Ryzen 8040 notebook APUs: Socket:
List_of_AMD_mobile_processors
Video signal standard
intervals, horizontal frequency and vertical frequency (collectively, pixel clock rate or video signal bandwidth), and horizontal/vertical sync polarity. The
Coordinated_Video_Timings
2018 AMD 12-nanometre processor microarchitecture
to improve power efficiency & reduce thermal density to allow for higher clock speeds, rather than design an entirely new floorplan for a physically smaller
Zen+
Serial bus connecting MAC devices with the Ethernet physical layer
300 ns after the rising edge of the clock. Hence, with a minimum clock period of 400 ns (2.5 MHz maximum clock rate) the MAC can safely sample MDIO during
Management_Data_Input/Output
Fifth generation of Intel Core processors
four processors: the 6800K, 6850K, 6900K, and the deca-core 6950X, with clock speeds ranging from 3 GHz to 4 GHz as well as up to 25 MB of L3 cache. Unusually
Broadwell_(microarchitecture)
Brand of discontinued microprocessors produced by Intel
distinguished from the faster, higher-end i-series processors by lower clock rates and disabling some features, such as hyper-threading, virtualization
Pentium
Mobile processor from Intel
model, the T9500, from late January 2008. The T9500 offered a 2.6 GHz clock rate, higher than all but the Extreme Edition of the Merom range, and 6 MB
Penryn_(microprocessor)
Design methodology for combinatorial logic integrated circuits
during the part of the clock cycle that the output is not being actively driven. Static logic has no minimum clock rate—the clock can be paused indefinitely
Dynamic logic (digital electronics)
Dynamic_logic_(digital_electronics)
System-on-a-chip designed by Apple
Universal 2 binary List of Mac models grouped by CPU type Snapdragon XR "Clock Rate Secrets: Shaping the Future of Computing". 99Encrypt. November 12, 2024
Apple_M2
Type of synchronous dynamic random-access memory
DDR technique, this type of RAM was marketed at speeds twice the actual clock rate, i.e. the 400 MHz Rambus standard was named PC-800. This was significantly
RDRAM
Brand by AMD
units : Compute Units 2 The effective data transfer rate of GDDR5 is quadruple its nominal clock, instead of double as it is with other DDR memory 3 Windows
AMD_FirePro
Set of rules describing computer system
measure a computer's speed by the clock rate (usually in MHz or GHz). This refers to the cycles per second of the main clock of the CPU. However, this metric
Computer_architecture
CPU microarchitecture by Intel
Sandy Bridge: 3% to 6% increase in CPU performance when compared clock for clock 25% to 68% increase in integrated GPU performance Ivy Bridge's temperatures
Ivy Bridge (microarchitecture)
Ivy_Bridge_(microarchitecture)
Microprocessor
a lower clock rate compared to the other 68000 CPUs) for games such as Big Run and Cisco Heat; another, fifth 68000 (at a different clock rate than the
Motorola_68000
Microarchitecture
concepts, the actual engineering implementation had its issues. The low clock rates were, in part, due to AMD's limitations as a "cutting edge" manufacturing
AMD_K5
CPU socket created by Intel
both sold separately. 1 The X79 chipset allows for increasing the base clock (BCLK), Intel calls it CPU Strap, by 1.00×, 1.25×, 1.66× or 2.50×. The CPU
LGA_2011
System-on-a-chip designed by Apple Inc.
dual-core 45 nm ARM Cortex-A9 CPU with a clock rate of 1 GHz, and a quad-core 32 nm PowerVR SGX543MP4 GPU with a clock rate of 250 MHz. Compared to the A5, the
Apple_A5X
Network in mathematical dynamics
Semiconductors TDA1022 similarly offered a 512-stage delay line but with a clock rate range of 5–500 kHz. Other common BBD chips include the Panasonic MN3002
Bucket-brigade_device
Low-power mobile processors
(TDP): 35 watt max Clock rate: 2000 (M1xx, L2 cache 512 KiB) Clock rate: 2000, 2100, 2200 MHz (M3xx, L2 cache: 1 MiB) Clock rate: 2200, 2300, 2400 MHz
AMD_Turion
Intel microprocessor, released in 2023
multiplier unlocked for overclocking. No suffix letter: Locked clock multiplier X: Unlocked clock multiplier (adjustable with no ratio limit) Xeon W-2400/2500
Sapphire_Rapids
System-on-chip processors designed by Apple Inc.
polygons/second and has a pixel fill rate of 2 billion pixels/second. The iPad 2's technical specifications page says the A5 is clocked at 1 GHz, though it can adjust
Apple_silicon
Code name for several Intel processors
Extreme X6800 has a clock rate of 2.93 GHz and a 1066 MT/s FSB, although it was initially expected to be released with a 3.33 GHz clock rate and a 1333 MT/s
Conroe_(microprocessor)
Serializer/deserializer pair in network equipment
serial clock rate. Implementations may also make use of a double-buffered register to avoid metastability when transferring data between clock domains
SerDes
16-bit microcontroller
embedded systems, as microcontrollers with external memory. The initial clock rate of the 80186 was 6 MHz, but due to more hardware available for the microcode
Intel_80186
Clock type
Quartz clocks and quartz watches are timepieces that use an electronic oscillator regulated by a quartz crystal to keep time. The crystal oscillator, controlled
Quartz_clock
Intel microprocessor series released in 2024
presentation in Taiwan. SKU names of Lunar Lake processors or details such as clock speeds were not announced. Lunar Lake is an ultra-low power mobile SoC design
Lunar_Lake
Production of waste heat by computer processors
a given CPU core, energy usage will scale up as its clock rate increases. Reducing the clock rate or undervolting usually reduces energy consumption;
Processor_power_dissipation
Intel microprocessor, released in 2018
on August 28, 2018. 14++ nm process, same as Coffee Lake Increased turbo clocks (300–600 MHz) 14 nm PCH Native USB 3.1 gen 2 support (10 Gbit/s) Integrated
Whiskey_Lake
Increasing processor speed beyond specification
overclocking is the practice of increasing the clock rate of a semiconductor device, such as a processor, beyond its rated speed, potentially increasing its performance
Overclocking
Intel microprocessor family launched in 2019
Coarse Pixel Shading (CPS), which is Intel's implementation of variable-rate shading (VRS). The architecture also includes an all-new HEVC encoder design
Ice_Lake_(microprocessor)
32-bit microprocessor by Motorola
asynchronous, so it is possible to run the coprocessors at a different clock rate than the CPU. Multiprocessing support is implemented externally by the
Motorola_68020
Family of 64-bit Intel microprocessors
processor system bus (a.k.a. Merced bus) had a 64 bit data width and 133 MHz clock with DDR (266 MT/s), being soon superseded by the 128-bit 200 MHz DDR (400
Itanium
Clock regulated by a pendulum
swinging at other rates. From its invention in 1656 by Christiaan Huygens, inspired by Galileo Galilei, until the 1930s, the pendulum clock was the world's
Pendulum_clock
CLOCK RATE
CLOCK RATE
Boy/Male
British, English, Irish
Woods; Fortified Place; Bright; Radiant
Boy/Male
Hebrew
Of God's flock.
Girl/Female
Muslim
Clock
Girl/Female
German, Hebrew, Irish
Flock of Sheep
Boy/Male
Indian, Malayalam
Clock
Surname or Lastname
Americanized spelling of German Krock.English
Americanized spelling of German Krock.English : perhaps a metonymic occupational name for a potter, from Middle English crock ‘pot’.
Boy/Male
Basque, Biblical, French, German, Hebrew
A Flock; Herd
Boy/Male
Hebrew
Of God's flock.
Surname or Lastname
English
English : see Cleek.Possibly an Americanized spelling of German Klick, Jewish Glick, or German and Jewish Glück (see Gluck).
Boy/Male
Gaelic
Little cloak.
Surname or Lastname
English
English : from a Middle English personal name Clac, which is from Old English Clacc or the Old Norse cognate Klakkr. As a personal name this is from a word meaning ‘lump’ and may have been used as a nickname for a large or thickset man. Reaney suggests that it could also be from clacker ‘chatterer’.
Boy/Male
Indian
Latch, Door lock
Surname or Lastname
English
English : metonymic occupational name for a locksmith, from Middle English, Old English loc ‘lock’, ‘fastening’.English : topographic name for someone who lived near an enclosure, a place that could be locked, Middle English loke, Old English loca (a derivative of loc as in 1). Middle English loke also came to be used to denote a barrier, in particular a barrier on a river which could be opened and closed at will, and, by extension, a bridge. The surname may thus also have been a metonymic occupational name for a lock-keeper.English, Dutch, and German : nickname for a person with fine hair, or curly hair, from Middle English loc, Middle High German lock(e) ‘lock (of hair)’, ‘curl’.Americanized spelling of German Loch.
Surname or Lastname
English
English : of uncertain origin; possibly a nickname for someone with thick curly hair, from Old French floc ‘stable of wool’. Alternatively, it may be a metonymic occupational name for a shepherd, from Old English flocc ‘herd’, ‘company’.German : unexplained.German (Flöck) : variant of Flück (see Fluck), or from a pet form of a personal name formed with Old Saxon flÅd ‘flood’.
Girl/Female
Arabic, Muslim
Clock
Surname or Lastname
English
English : topographic name for someone who lived on a small plot of land, from Middle English plocke ‘small piece of ground’.Americanized spelling of German Ploch.Variant of German Block.
Biblical
a flock
Surname or Lastname
German and Dutch
German and Dutch : from Middle High German bloch, Middle Dutch blok ‘block of wood’, ‘stocks’. The surname probably originated as a nickname for a large, lumpish man, or perhaps as a nickname for a persistent lawbreaker who found himself often in the stocks.English : possibly a metonymic occupational name for someone who blocks, as in shoemaking and bookbinding, from Middle English blok ‘block’.Jewish (Ashkenazic) : Americanized spelling of Bloch (see Vlach).Adriaen Coertsz Block was a Dutch-born merchant-explorer who traded along the CT coast and Long Island shortly after Hudson’s voyage to the region in 1609. Block Island, between the north fork of Long Island and RI, which he used as a base of operations, is named after him.
Boy/Male
Biblical Hebrew
A flock.
Girl/Female
Arabic
Lock; Awesome
CLOCK RATE
CLOCK RATE
Boy/Male
Hindu
Lord Vishnu
Boy/Male
Hindu
Name of a poet
Boy/Male
Hindu, Indian, Marathi
Striving for the Earth
Surname or Lastname
Dutch
Dutch : occupational name from akkerman ‘plowman’; a frequent name in New Netherland in the 17th century. Later, it probably absorbed some cases of the cognate German and Swedish names, Ackermann and Åkerman respectively.English : from a medieval term denoting feudal status, Middle English akerman (Old English æcerman, from æcer ‘field, acre’ + man ‘man’). Typically, an ackerman was a bond tenant of a manor holding half a virgate of arable land, for which he paid by serving as a plowman. The term was also used generically to denote a plowman or husbandman.Variant of German and Jewish Ackermann.
Girl/Female
Hindu
Musical, Music
Girl/Female
Indian
Queen of Love
Boy/Male
English
Tailor. Surname.
Girl/Female
Indian, Sanskrit
An Assemblage of Yellow; Yellow Jasmine
Boy/Male
Arabic
Tender; Comely; Delicate
Boy/Male
Tamil
Hymns of Lord, Verse
CLOCK RATE
CLOCK RATE
CLOCK RATE
CLOCK RATE
CLOCK RATE
n.
A lock of wool or hair.
n.
A click. See 3d Click, 2.
adv.
Entirely; quite; as, chock home; chock aft.
v. t.
To prevent ingress or access to, or exit from, by fastening the lock or locks of; -- often with up; as, to lock or lock up, a house, jail, room, trunk. etc.
v. t. & i.
To call, as a hen. See Cluck.
v. t.
To cover with, or as with, a cloak; hence, to hide or conceal.
n.
The hammer in the lock of a firearm.
v. t.
To stop or fasten, as with a wedge, or block; to scotch; as, to chock a wheel or cask.
n.
The striking of a clock.
v. t.
To flock to; to crowd.
v. t.
A section of a railroad where the block system is used. See Block system, below.
v. t.
To move with the sound of a click.
n.
To shape on, or stamp with, a block; as, to block a hat.
v. i.
To give off crock or smut.
v. t.
To fasten in or out, or to make secure by means of, or as with, locks; to confine, or to shut in or out -- often with up; as, to lock one's self in a room; to lock up the prisoners; to lock up one's silver; to lock intruders out of the house; to lock money into a vault; to lock a child in one's arms; to lock a secret in one's breast.
n.
The act of cocking; also, the turn so given; as, a cock of the eyes; to give a hat a saucy cock.
v. t.
To lay up in a crock; as, to crock butter.
v. t.
To coat with flock, as wall paper; to roughen the surface of (as glass) so as to give an appearance of being covered with fine flock.
v. t.
To fasten with a lock, or as with a lock; to make fast; to prevent free movement of; as, to lock a door, a carriage wheel, a river, etc.